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Power semiconductor chip packaging structure

A chip packaging structure, power semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device parts, electric solid-state devices, etc., can solve the problems of low withstand voltage, high turn-off speed unsuitable for SiC chips, etc., and achieve high endurance Pressure resistance, reduce emitter voltage overshoot and oscillation, and reduce the effect of breakdown risk

Pending Publication Date: 2022-03-22
GLOBAL ENERGY INTERCONNECTION RES INST CO LTD +1
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Problems solved by technology

[0003] However, at present, most of the packaging structures for SiC chips still use the welding packaging type of silicon-based chips. The power semiconductor chip packaging structure of the existing technology has low pressure resistance, and its packaging parameters are obviously not suitable for the high turn-off speed of SiC chips. , low loss characteristics, so it is necessary to develop a new packaging structure for high-voltage power chips

Method used

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Embodiment Construction

[0036] The technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0037] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer" and the like are based on the orientation or positional relationship shown in the accompanying drawings, and are only for It is convenient to describe the present invention and simplify the description, but does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a ...

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Abstract

The invention provides a power semiconductor chip packaging structure. The power semiconductor chip packaging structure comprises a first substrate electrode; the power semiconductor chip is positioned on a part of the first substrate electrode and is electrically connected with the first substrate electrode; and a coil shielding structure surrounding the power semiconductor chip, wherein the coil shielding structure comprises a conductive coil and an insulator wrapping the conductive coil. The power semiconductor chip packaging structure has relatively high voltage resistance.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a power semiconductor chip packaging structure. Background technique [0002] At present, the vast majority of high-power power electronic devices in power systems use silicon power electronic devices, such as IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar transistor) chip devices, thyristor chip devices, GTO (Gate Turn-Off thyristor, Thyristor) chip devices can be turned off to realize the control and conversion of electric energy. Since silicon power electronic devices are limited by the physical characteristics of the material itself such as withstand voltage and operating temperature, it is necessary to fundamentally improve high-power power electronic equipment. To improve the reliability and stability of the system, reduce the overall loss of the system, and improve the control conversion efficiency of energy, it is necessary to research and...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/552H01L25/07H01L23/498
CPCH01L23/552H01L25/072H01L23/49844
Inventor 王亮周扬代安琪韩荣刚林仲康唐新灵
Owner GLOBAL ENERGY INTERCONNECTION RES INST CO LTD
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