Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Arc-shaped fin top forming method and fin field effect transistor

A fin field effect, arc-shaped technology, applied in transistors, semiconductor devices, electric solid devices, etc., can solve problems affecting the electrical characteristics of devices, lattice distortion, fin surface damage, etc.

Pending Publication Date: 2021-12-17
INST OF MICROELECTRONICS CHINESE ACAD OF SCI +1
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, reactive ion etching uses high-energy plasma to achieve arc-shaped fin tops. This high ion energy will cause damage, resulting in damage to the fin surface, lattice distortion, and the by-products Entering the gate channel induces charge trapping, and the drop in gate threshold voltage affects the electrical characteristics of the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Arc-shaped fin top forming method and fin field effect transistor
  • Arc-shaped fin top forming method and fin field effect transistor
  • Arc-shaped fin top forming method and fin field effect transistor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0019] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0020] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for the purpose of clarity. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, s...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an arc-shaped fin top forming method and a fin field effect transistor. The method comprises the following steps that: a fin structure is provided; atomic layer etching is carried out on the top of the fin structure, and whether etching is carried out again is determined according to the etching amount of the fin structure; if yes, atomic layer etching on the top of the fin structure continues to be executed, and whether the etching process is conducted again or not is determined according to the etching amount of the fin structure; and if not, etching is stopped. The atomic layer etching process is circularly executed on the top of the fin structure to form the arc-shaped fin top, although the etching rate of the circulating process is lower than that of an existing mode, the circulating process does not damage the surface, and the pattern size and the loading density can be minimized. As the surface is not damaged, charge trapping is not formed, and the electrical characteristics of the device are not influenced by the reduction of the gate threshold voltage of the device.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, in particular to a method for forming an arc-shaped fin top and a fin field effect transistor. Background technique [0002] In the manufacturing process of Fin Field Effect Transistor (Fin FET), the manufacturing of fins is a very important part. As for the shape of the fin top, the sharper it is, the easier it is to cause electrical failure of the gate insulating film due to the electric field crowding effect. Therefore, the fin top is usually made into a circular arc shape. [0003] In the related art, an arc-shaped fin top is formed by adopting a dry etching process based on RIE (Reactive Ion-assisted Etching, reactive ion etching). [0004] However, reactive ion etching uses high-energy plasma to achieve arc-shaped fin tops. This high ion energy will cause damage, resulting in damage to the fin surface, lattice distortion (lattice distortion), and the by-produc...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/306H01L21/336H01L29/78H01L27/108H01L21/8242H10B12/00
CPCH01L21/30604H01L29/66795H01L29/785H10B12/00H10B12/01
Inventor 黄元泰叶甜春周娜李俊杰李琳
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products