Method for improving memory logic calculation efficiency based on memristor

A logic computing and memristor technology, applied in the field of improving the efficiency of memristor-based in-memory logic computing, to achieve the effects of improving efficiency, reducing computing delay, and improving service life

Pending Publication Date: 2021-10-26
NANJING UNIV OF SCI & TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Currently, there is little work combining these two families of gates together in the same memristor crossbar array

Method used

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  • Method for improving memory logic calculation efficiency based on memristor
  • Method for improving memory logic calculation efficiency based on memristor
  • Method for improving memory logic calculation efficiency based on memristor

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Embodiment

[0041] combine figure 1 , this embodiment discloses a method for improving the logic calculation efficiency in the memristor memory, and the specific steps are as follows:

[0042]Step 1. The resistors required by the gates of the IMPLY logic family increase the hardware overhead of the circuit and increase the complexity of the memristor row / column decoder. According to this feature, it is proposed to use a memristor instead of a resistor.

[0043] figure 2 (a) shows the improved IMPLY logic family gate, which uses a memristor R′ G to replace the resistor. The input memristors in1 and in2 are respectively connected to the voltage source V 1 and V 2 , the memristor R′ G Connect the voltage source V g . Suppose in1, in2 and R' G The voltage of the contributing node is V 3 , then according to Kirchhoff’s current law, we have:

[0044]

[0045] where R in1 and R in2 are the resistance values ​​of the input memristors in1 and in2, respectively. For a memristor no...

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Abstract

The invention discloses a method for improving memory logic calculation efficiency based on a memristor, which combines an IMPLY logic family and an MAGIC logic family, and reduces time delay and hardware resource overhead of in-memory calculation by simultaneously utilizing the advantages of the two logic families. The method comprises the following steps: firstly, replacing an external resistor required by an IMPLY logic family gate and optimizing the design of an MAGIC logic family gate by using a memristor unit in a memristor crossbar switch array; secondly, analyzing the compatibility of the improved IMPLY logic family gate and the improved MAGIC logic family gate in the same memristor crossbar switch array; and finally, providing an optimization mapping method combining two logic families. The invention is easy to operate and high in practicability, and the efficiency of logic calculation in the memristor memory can be improved.

Description

technical field [0001] The invention belongs to the field of new device memristors, and in particular relates to a method for improving the efficiency of memory logic calculation based on memristors. Background technique [0002] Recently, memristor-based in-memory computing has attracted much attention. By combining the storability and computability of memristor devices, memristor-based in-memory computing could break through the so-called von Neumann bottleneck. The purpose of logic-in-memory (LIM) is to implement any computational task in memory. The IMPLY series is the earliest stateful logic series in LIM. The IMPLY family of gates requires two memristor cells and an external resistor, and can perform operations in one clock cycle. However, the output of the IMPLY series of gates overrides one of the inputs, which makes multi-stage cascades difficult. Some researchers have proposed the MAGIC series of gates, which use an additional memristor unit to exclusively stor...

Claims

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Application Information

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IPC IPC(8): G06F30/327G06F30/337G06F111/04
CPCG06F30/327G06F30/337G06F2111/04
Inventor 邹敏辉赵庆玲
Owner NANJING UNIV OF SCI & TECH
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