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Segmented capacitor array of analog-to-digital converter and switching method

A technology of analog-to-digital converters and capacitor arrays, which is applied in the directions of analog/digital conversion, analog/digital conversion calibration/testing, code conversion, etc., can solve problems such as errors, high effective bit capacitor array capacitance mismatch effects, etc., to improve Effects of converting linearity, reducing error, and improving conversion accuracy

Pending Publication Date: 2021-09-28
西安电子科技大学芜湖研究院
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Problems solved by technology

[0004] Embodiments of the present invention provide a segmented capacitor array of an analog-to-digital converter and a switching method, which are used to solve the influence of the capacitance mismatch of the high effective bit capacitor array in the segmented capacitor array in the prior art, and at the same time solve the The influence of error

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  • Segmented capacitor array of analog-to-digital converter and switching method
  • Segmented capacitor array of analog-to-digital converter and switching method
  • Segmented capacitor array of analog-to-digital converter and switching method

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Embodiment Construction

[0029] Next, the technical solutions in the embodiments of the present invention will be apparent from the embodiment of the present invention, and it is clearly described, and it is understood that the described embodiments are merely embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, there are all other embodiments obtained without making creative labor without making creative labor premises.

[0030] In order to improve the conversion accuracy of Saradc, many correction techniques are proposed. Among them, by increasing redundant bits, the error caused by the mismatch can be kept within the allowable range of redundant spaces. The addition of redundant bits has a significant effect on the offset calibration and capacitance dispensing calibration, and the accuracy of the A / D converter is more efficiently improved with the digital error correction circuit. However, its design requirements for redundant bits are r...

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Abstract

The invention discloses a segmented capacitor array of an analog-to-digital converter and a switching method. The segmented capacitor array comprises a low-significant-bit capacitor array and a high-significant-bit capacitor array, wherein the high-significant-bit capacitor array is formed by connecting non-redundant-bit capacitors and redundant-bit capacitors, the non-redundant-bit capacitors are C, 2C, 4C... 2M-2C in sequence, and the redundant-bit capacitors comprise C, C, 2C, 4C... 2M-2C. And the redundant bit capacitors are inserted into the non-redundant bit capacitors in sequence. Through a reasonable redundant bit construction mode, under the condition that the number and the area of unit capacitors in the capacitor array are not increased, the influence of capacitor mismatch in the segmented capacitor array is reduced, and it is guaranteed that redundant bits can provide enough redundant digital code space; meanwhile, the offset calibration of the comparator can be completed by reasonably utilizing redundancy; and a corresponding capacitor array switching method is utilized, so errors are further reduced, and the precision is improved.

Description

Technical field [0001] The present invention relates to the field of electronic circuit technology, and more particularly to a segment capacitance array and a switching method of an analog-to-digital converter. Background technique [0002] With the rapid development of CMOS integrated circuit, SAR ADC (SUCCESSIVE-Approximation-Register Analog-to-Digital Converter, successive approximation register modulus converter) is still ADC research hotspot. In order to reduce its power consumption, the structure of binary weight retention array is used. [0003] For N-bit Saradc, classic binary weight retransmission arrays such as figure 1 Indicated. Depend on figure 1 It can be seen that the number of unit capacitors and the area and the accuracy n are index relationships. In order to alleviate the problem, the prior art proposes a segmented capacitor array such as figure 2 with image 3 Indicated. The mismatch of high-active bit capacitance arrays in the segmented capacitor array will red...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/46H03M1/10
CPCH03M1/462H03M1/1009
Inventor 吴勇闫瑞峰汤华莲张丽李小明
Owner 西安电子科技大学芜湖研究院
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