Floating gate type split gate flash memory device structure and manufacturing method thereof

Abstract

The invention relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a floating gate type split gate flash memory device structure and a manufacturing method thereof. The method comprises the following steps of forming a floating gate oxide layer, a floating gate polycrystalline silicon layer, a polycrystalline silicon spacer layer and a control gate polycrystalline silicon layer which are stacked in sequence on a flash memory region of a first conductive type substrate; defining a flash memory cell region; forming a first conductive type anti-punch-through injection region at the position of the flash memory cell region; depositing a first dielectric layer; etching the first dielectric layer to form a first side wall; taking a mask layer and the first side wall as masks, and etching and removing the control gate polycrystalline silicon layer and the polycrystalline silicon spacer layer which do not cover the first side wall; performing first conductive type halo injection to form a first conductive type halo; depositing a second dielectric layer, and etching to form a second side wall; etching and removing the floating gate polycrystalline silicon layer and the floating gate oxide layer which do not cover the first side wall and the second side wall; and forming a second conductive type injection region by taking the second side wall and the first side wall as masks.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, in particular to a structure of a floating-gate split-gate flash memory device and a manufacturing method thereof. Background technique [0002] Floating-gate split-gate flash memory is widely used in various embedded electronic products such as financial IC cards, automotive electronics and other fields because it is beneficial to save chip area and increase storage integration density. [0003] figure 1 A schematic cross-sectional structure diagram of a floating-gate split-gate flash memory device in the related art is shown, referring to figure 1 , the floating gate split-gate flash memory device includes a first P-type region 17 formed in a P-type substrate 11, and the first P-type region 17 is used to prevent device punch-through. A drain region 25 and a source region 24 are respectively formed in the P-type substrate 11 on both sides of the...

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Problems solved by technology

[0006] The present application provides a floating-gate split-gate flash memory device structure and its manufacturing method, which are used to solve the problem in the related art that the reduction of the size of the split-gate structure will easily cause short channel effects

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