Power module thermal modeling method based on Fourier series

Abstract

The invention discloses a power module thermal modeling method based on Fourier series. The method comprises the following steps: S1, listing a Laplace three-dimensional heat conduction partial differential equation of the temperature of a power module; S2, determining a boundary condition expression of each surface of the module; S3, converting the Laplace three-dimensional heat conduction partial differential equation into a Laplace three-dimensional heat conduction ordinary differential equation; S4, listing a general expression containing an undetermined coefficient and a feature root; S5, obtaining a Fourier series expression containing an undetermined coefficient; S6, obtaining a Fourier series expression of a module DBC and a substrate structure temperature field; S7, obtaining a Fourier series expression of an overall temperature field of the module; and S8, obtaining a three-dimensional temperature field of the power module, extracting the highest temperature of the chip, and calculating the thermal resistance of the power module. According to the method, the thought that the sizes of all layers of the power module are expanded to be consistent for Fourier coefficient solving is adopted, and accurate extraction of the temperature gradient of the multi-layer structure power module is achieved. In addition, the method needs a small amount of calculation, is short in solving time, and can achieve the online prediction of the temperature of the power semiconductor chip.

Description

technical field [0001] The invention belongs to the field of power electronic devices, and in particular relates to a thermal modeling method of a power module based on Fourier series. Background technique [0002] In order to meet the integration requirements of high-power converters such as new energy power generation and motor drive, multiple power semiconductor chips are usually packaged into power modules. Compared with discrete devices, power modules have large capacity, high integration, and good ease of use. The advantages. However, the trend toward high power density in high-power converters and high current density in chips exacerbates the chip temperature gradient. The traditional on-line detection method of power chip junction temperature mainly utilizes thermal-sensitive electrical parameters, but only the average temperature of the chip can be obtained, and the temperature gradient of the chip cannot be obtained. When the average temperature of the chip is nor...

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Problems solved by technology

The current Fourier series thermal modeling method still has the following limitations in the study of chip temperature gradient: 1. The number of layers of the power module: due to the differences in the size of each layer of the power module, the temperature field of a single-layer structure can only be established at present. Expanding to the multi-layer packaging structure of power modules limits the versatility; 2. Multi-heat source calculation: At present, the research on the temperature field formed under a single uniform heat source is rarely focused on multi-chip thermal coupling, which limits its application in multi-chip parallel power Application of the module

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