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High-voltage protection integrated circuit of CMOS auxiliary triggering SCR structure

A high-voltage protection, integrated circuit technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of ESD robustness and slow response speed, and achieve fast anti-latch characteristics, reduce trigger voltage, The effect of quick response

Active Publication Date: 2021-03-26
JIANGNAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] Aiming at the problems of slow response speed, easy latch-up and poor ESD robustness per unit area in traditional high-voltage ESD / EOS protection schemes, the present invention proposes a high-voltage protection integrated circuit with CMOS auxiliary trigger SCR structure

Method used

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  • High-voltage protection integrated circuit of CMOS auxiliary triggering SCR structure
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  • High-voltage protection integrated circuit of CMOS auxiliary triggering SCR structure

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Embodiment Construction

[0033] Below in conjunction with accompanying drawing and specific embodiment the present invention will be described in further detail:

[0034] The invention provides a CMOS auxiliary trigger SCR structure high voltage protection integrated circuit. The invention combines SCR, off-state NMOS and on-state PMOS structures to form a CMOS auxiliary trigger SCR current path, which can improve the response speed and anti-latch ability of the circuit; and, through the parallel connection of the SCR and the parasitic triode and MOS tube, it can Achieve higher ESD current discharge efficiency. In addition, by optimizing the circuit unit structure and layout design and reducing the number of masks, it can take into account better process compatibility and lower manufacturing costs while ensuring a smaller chip area.

[0035] The three-dimensional structure of the high voltage protection integrated circuit unit of the present invention is as follows: figure 1 As shown, the circuit is c...

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Abstract

The invention provides a high-voltage protection integrated circuit of a CMOS auxiliary triggering SCR structure, and belongs to the field of electrostatic discharge and surge protection of integratedcircuits. The high-voltage protection integrated circuit comprises an embedded CMOS, an SCR structure and a metal wire. By utilizing the advantage of strong ESD robustness of the SCR, quick responseand latch-up resistance can be realized by embedding the MOS tube structure in the circuit, and higher ESD current discharge efficiency can be achieved by parallel conduction of the SCR, a parasitic triode and a MOS tube. Besides, through optimization of a circuit unit structure and a layout design, the number of masks is reduced, and better process compatibility and lower manufacturing cost can be considered while a smaller chip area is occupied.

Description

technical field [0001] The invention belongs to the field of electrostatic discharge and surge protection of integrated circuits, and relates to an electrostatic surge protection circuit unit, in particular to a CMOS auxiliary trigger SCR structure high-voltage protection integrated circuit, which can be used to improve the electrostatic protection of IC chips and the surge protection of electronic products. surge protection. Background technique [0002] The continuous progress of the semiconductor process has greatly improved the integration of chips and the performance of related electronic products. However, as the volume of integrated circuits (ICs) and electronic products continues to shrink, the degradation of some electrical properties is becoming more and more serious, especially the reliability problems, process fluctuations and power consumption problems of integrated circuits and electronic products are obvious. In terms of reliability issues, electrostatic disc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
CPCH01L27/0262H01L27/0266H01L27/0259H01L27/0296
Inventor 梁海莲冯希昆顾晓峰
Owner JIANGNAN UNIV
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