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Thin film transistor and manufacturing method thereof, array substrate, display panel and equipment

A technology of thin film transistor and bottom surface, which is applied in the fields of thin film transistor and its manufacturing method, array substrate, display panel and equipment, and can solve the problems of uneven screen flicker of display device and the like

Pending Publication Date: 2020-10-27
GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Based on this, the present application provides a thin film transistor and its manufacturing method, array substrate, display panel and electronic equipment, so as to reduce the RC delay on the gate and improve the problem of uneven flickering of the display screen

Method used

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  • Thin film transistor and manufacturing method thereof, array substrate, display panel and equipment
  • Thin film transistor and manufacturing method thereof, array substrate, display panel and equipment
  • Thin film transistor and manufacturing method thereof, array substrate, display panel and equipment

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Embodiment Construction

[0026] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary, are only for explaining the present application, and should not be construed as limiting the present application. In addition, various specific process and material examples are provided herein, but one of ordinary skill in the art may recognize the use of other processes and / or the use of other materials.

[0027] see figure 1 , the thin film transistor 10 includes a gate 11 , a gate insulating layer 12 , an active layer 13 and a protection layer 14 . The gate 11 is disposed on the side of the gate insulating layer 12 facing away from the active layer 13 , the grid 11 has a sheet resistance less than or equal to a preset grid ...

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Abstract

The invention relates to the technical field of display, and particularly discloses a thin film transistor and a manufacturing method thereof, an array substrate, a display panel and an electronic device. The thin film transistor comprises a grid electrode, a grid electrode insulating layer, an active layer and a protective layer. The active layer is arranged on one side of the gate insulation layer, the gate is arranged on the other side, deviating from the active layer, of the gate insulation layer, the square resistance value of the gate is smaller than or equal to a preset square resistance value, and the gate at least comprises a first metal layer. The protective layer at least covers the exposed surface of the first metal layer to prevent the first metal layer from being oxidized. Inthis way, RC delay on the grid electrode can be reduced, and the problem that a display device is uneven in image flickering is solved.

Description

technical field [0001] The present application relates to the field of display technology, in particular to a thin film transistor and a manufacturing method thereof, an array substrate, a display panel and equipment. Background technique [0002] In the prior art, low temperature polysilicon (Low Temperature Poly-Silicon, LTPS) panels have been widely used in smart phones and tablet computers. Since the gate itself has a predetermined resistance, a parasitic capacitance is also generated between the gate and the drain of the thin film transistor, and the resistance and capacitance will form a resistance-capacitance delay (RC delay) circuit. [0003] Based on the development trend of display panels towards large size and high resolution, higher requirements are put forward for the trace width inside the display panel - the gate width is getting smaller and the gate length is getting longer and longer, which means As a result, the load on each gate is getting larger, the cha...

Claims

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Application Information

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IPC IPC(8): H01L29/786H01L21/336H01L29/423H01L27/12G02F1/1362G02F1/1368
CPCH01L29/78675H01L29/66757H01L29/42356H01L27/1214G02F1/1362G02F1/1368
Inventor 李全虎
Owner GUANGDONG OPPO MOBILE TELECOMM CORP LTD
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