Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Multi-graph processing FPGA acceleration method based on WebP compression algorithm

A compression algorithm and image processing technology, applied in the field of image processing, can solve problems such as high algorithm complexity, low delay, and low processing efficiency

Pending Publication Date: 2020-10-23
上海雪湖科技有限公司
View PDF9 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The complexity of the WebP algorithm is high, and the calculation of the next macroblock must wait until the completion of the calculation of the previous macroblock, so it becomes a blocked "Blocked" design, and the processing efficiency is relatively low, such as figure 2 , to process 4 pictures, from T1 time to T3 time span, the whole is the processing mode of front and back block
[0006] With the advent of the 5G era, data transmission with high reliability, low latency, and large bandwidth has increased the performance requirements for cloud computing. In order not to affect customer experience, this requires that the cycle of image compression and encoding be shortened. Although the WebP algorithm greatly reduces The number of codes is reduced, but the overall algorithm complexity is still higher than other codes

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Multi-graph processing FPGA acceleration method based on WebP compression algorithm
  • Multi-graph processing FPGA acceleration method based on WebP compression algorithm
  • Multi-graph processing FPGA acceleration method based on WebP compression algorithm

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0022] Such as image 3 As shown, the present invention discloses an FPGA acceleration method based on WebP compression algorithm for multi-image processing, and proposes an effective solution for accelerating WebP algorithm on a field editable gate array (FPGA). By adopting parallel pipeline processing Encoding is more efficient than serial processing on the CPU, and the board resources of the FPGA are rationally used. Under the influence of the FPGA accelera...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of image processing, in particular to a WebP compression algorithm-based multi-image processing FPGA acceleration method, which comprises the following steps: transmitting an image according to RGB three-channel data, and converting the image into corresponding YUV data; caching the YUV data generated by the corresponding pictures into an on-chip DDR cache, reading the data into a calculation module through bus data reading, reading the corresponding data from the on-chip DDR cache according to the processing progress of the plurality of pictures, and putting the corresponding data into a dependent data cache region; wherein the plurality of pictures correspondingly depend on a plurality of partitions of the data cache region, and when the calculation traversal of one YUV macro block of one picture is completed, performing macro block calculation traversal of the next picture, and switching in turn until all macro blocks of the batch of pictures are completely coded; according to the method, an effective acceleration scheme is provided, encoding is achieved in a parallel pipeline processing mode, the method is more efficient compared with serial processing on a CPU, the method is more suitable for processing the blocked closed-loop algorithm compared with the CPU, and the output frame rate of the whole WebP algorithm is increased.

Description

technical field [0001] The invention relates to the technical field of image processing, in particular to an FPGA acceleration method for multi-image processing based on a WebP compression algorithm. Background technique [0002] With the development of image acquisition equipment such as mobile phones, tablets, and digital cameras, and the increase in image pixel scale, the scale of Internet image data has grown exponentially. The latest research shows that from 2016 to 2021, the scale of data storage on data center servers will increase fourfold, from 663EB to 2.6ZB, and most of the data storage comes from images and videos. [0003] Images currently occupy up to 60%-65% of bytes on most web pages, and image data in pages is especially important for mobile devices, where less image information saves bandwidth and battery life. WebP is a new image format proposed by Google based on VP8 encoding in order to meet the increasingly high bandwidth requirements. Because WebP us...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06T1/20G06T1/60G06T9/00
CPCG06T1/20G06T1/60G06T9/00Y02D10/00
Inventor 杨晓成
Owner 上海雪湖科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products