Super-junction insulated gate bipolar transistor structure and manufacturing method thereof

Abstract

The invention discloses a super-junction insulated gate bipolar transistor structure and a manufacturing method thereof. The super-junction insulated gate bipolar transistor structure comprises a collector region, a first epitaxial layer and a second epitaxial layer which are sequentially arranged along a first direction. The collector region is matched with a collector; a plurality of super junction structures are distributed in the first epitaxial layer at intervals, each super junction structure comprises more than two super junctions which are sequentially arranged along a first direction,and the more than two super junctions are mutually staggered in a second direction; a plurality of first grooves are distributed in the second epitaxial layer at intervals, and a grid electrode is arranged in each first groove. According to the super-junction insulated gate bipolar transistor structure provided by the embodiment of the invention, the saturation voltage drop during conduction canbe reduced, and the super-junction insulated gate bipolar transistor structure provided by the embodiment of the invention can be used for accelerating the compounding of holes in a drift region whena device is turned off, reducing trailing current and reducing turn-off loss.

Description

technical field [0001] The invention relates to a transistor, in particular to a super junction insulated gate bipolar transistor structure and a manufacturing method thereof, which belong to the technical field of semiconductors. Background technique [0002] The structure of a super junction insulated gate bipolar transistor in the current prior art is as follows figure 1 As shown, 1 is the P-collector region, 2 is the N-drift region, 3 is the P-type super junction region or P-type super junction structure, 4 is the N+ drift region, 5 is the gate oxide layer, and 6 is the gate , 7 is the P well region, 8 is the N+ emitter, 9 is the dielectric layer, 10 is the emitter metal, 11 is the P+ collector, 12 is the collector metal, the P in the existing super junction insulated gate bipolar transistor The region of the type super junction is on the same vertical line in the longitudinal direction. This structure is the same as that of the super junction VDMOSFET device. However, ...

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Problems solved by technology

[0002] The structure of a super junction insulated gate bipolar transistor in the current prior art is as follows figure 1 As shown, 1 is the P-collector region, 2 is the N-drift region, 3 is the P-type super junction region or P-type super junction structure, 4 is the N+ drift region, 5 is the gate oxide layer, and 6 is the gate , 7 is the P well region, 8 is the N+ emitter, 9 is the dielectric layer, 10 is the emitter metal, 11 is the P+ collector, 12 is the collector metal, the P in the existing super junction insulated gate bipolar transistor The region of the type super junction is on the same vertical line in the longitudinal direction. This structure is the same as that of the super junction VDMOSFET device. However, for the super junction VDMOSFET, there is only one kind of conductive carrier, such as an N-channel VDMOSFET Only electrons conduct electricity. In this case, electrons can pass through the middle of the P-type super junction region; but for super junction insulated gate bipolar transistors, there are two types of conductive carriers, both electrons and holes participate in conduction , such as N-channel insulated gate bipolar transistors, electrons from top to bottom and holes from bottom to top must pass through the entire N-drift region to complete recombination. Therefore, the existing super junction insulated gate bipolar transistor The conduction efficiency of the transistor is very low

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