IP management system and IP management method
A technology of management system and configuration management, which is applied in the field of IP management system, can solve the problems of complicated and lengthy design process and the decrease of accuracy rate, and achieve the effect of reducing the work of chip designers, improving efficiency, improving efficiency and accuracy rate
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specific Embodiment approach 1
[0036] Specific implementation mode one: as figure 1 As shown, an IP management system in this embodiment includes:
[0037] The IP management system is mainly used to realize the management and modeling of soft and hard IP, and provide basic services for IP-level instantiation and interconnection in chip design;
[0038] The IP management system mainly includes a configuration management module, a syntax analysis module, a register analysis module, a model generation module, a text generation module, a global inspection module and an integration module.
specific Embodiment approach 2
[0039] Embodiment 2: The difference between this embodiment and Embodiment 1 is that the configuration management module is used for analyzing, extracting and distributing IP management system configuration files;
[0040] Described configuration file content comprises each soft IP, the location information of the source file of hard IP or the model file of each soft, hard IP, each soft, macro information of hard IP, each soft, path information of hard IP, and each soft , the location information of the SystemRDL file corresponding to the hard IP or the location information of the user-defined register information description file;
[0041] The model files of the soft and hard IP are the same as the source files, which are provided in the IP and already exist;
[0042] The files provided by the soft and hard IP have at least one of the source files or model files, which can be all or only one, and the IP management system can manage this kind of IP;
[0043] Generally speakin...
specific Embodiment approach 3
[0045] Specific implementation mode three: this implementation mode is different from specific implementation mode one or two in that: the syntax analysis module is specifically:
[0046] When the source files of soft and hard IP or the model files of soft and hard IP are processed by Verilog syntax compiler (such as Pyverilog, um...compiler processing should be well known, Pyverilog is a kind of compiler front-end tool) to generate After the abstract syntax tree (AST), the syntax parsing module uses the traversal algorithm to process the abstract syntax tree to realize the acquisition of three types of information, including soft and hard IP levels, parameterization, and ports.
[0047] Other steps and parameters are the same as those in Embodiment 1 or Embodiment 2.
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