Satellite-borne data combiner multiplexer testing device and method

Abstract

The invention discloses a satellite-borne data combiner multiplexer test device and method. The device comprises an analog data generation module, a multiplexer data acquisition module and an analysisand comparison module arranged on an upper computer. Wherein the analog data generation module and the multiplexer data acquisition module are realized through an FPGA, and the analog data generationmodule is used for simulating a load to generate multiple frames of image data, performing format conversion on each frame of image data, converting single-ended data into differential data, and sending the differential data to the satellite-borne data combiner multiplexer for multiplexing processing; the multiplexer data acquisition module is used for acquiring SerDes type image data after multiplexing processing output by the satellite-borne data combiner multiplexer, caching the SerDes type image data after serial data parallelization processing, and sending the cached data to the analysisand comparison module of the upper computer in a PCIe bus mode; and the analysis and comparison module is used for carrying out check bit judgment on the received data and verifying the correctness of the data acquired by the satellite-borne data combiner multiplexer.

Description

technical field [0001] The invention relates to the technical field of spacecraft load testing, in particular to a testing device and method for a spaceborne data combining multiplexer. Background technique [0002] The function of the spaceborne data multiplexer is to receive the data of each payload (such as satellite platform data, payload data, etc.), multiplex and output it according to specific standards and formats, to complete the downlink processing task of scientific data . "Multiplexing" refers to framing multi-source data into a unified transmission frame according to a certain format and standard, so as to facilitate data transmission between stars and between stars and the ground. The connection relationship between the on-board data multiplexer and other equipment is as follows: figure 1 shown. [0003] Before launch, spacecraft payloads such as the spaceborne data multiplexer need to go through a series of ground tests, debugging and experiments. The perf...

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Problems solved by technology

[0006] Question 1: The output of the on-board data multiplexer is upgraded from LVDS with source synchronous clock to SerDes, so the acquisition equipment in the test device also needs to be replaced accordingly

There are three main problems with this technology. First, there are many signal lines, and three types of signals are required to transmit a set of data; second, the transmission rate is limited, which can no longer meet the data transmission requirements between the on-board data multiplexer and the acquisition equipment.

Third, the bit error rate is high. The LVDS signal using the source synchronous clock has no error correction means. When the transmission rate is higher, the probability of bit error is greater.

There will be a clock skew (Skew) between the synchronous clock and the data. When the synchronous clock frequency is fast to a certain extent, this skew will cause bit errors

In order to reduce the bit error rate, the transmission rate must have a limit

[0010] Question 2: PCI (Peripheral Component Interconnect, Peripheral Component Interconnect Standard) technology is used to transmit data between the acquisition device and the host computer

The main problem of this technology is the low transmission rate, which can no longer meet the data transmission requirements between the acquisition device and the host computer.

[0012] The reasons for the low transmission rate are as follows: PCI is a parallel bus, which involves data synchronization of multiple data lines. Generally, it is difficult to increase the rate, and the longer the bus, the more susceptible to interference

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