Method for realizing moving target detection acceleration

Abstract

The invention discloses a method for realizing moving target detection acceleration. The method comprises the steps of writing an MTD moving target detection algorithm by using C / C + + in vivalohls software; packaging the top layer into a function module; writing a test file by using C / C + + in vivalohls software; comparing the output data of the test file with the simulation output data of matlabsoftware; discriminating degree of matching, verifying correctness of a function module, aDDITION OF CONSTRAINTS AND OPTIMIZATION STRATEGY, hardware conversion is carried out to generate a hard acceleration IP core which can be synthesized by the FPGA; and automatically generating an excitation file according to the test file by using vivadohls software, automatically calling a waveform simulation tool to automatically start simulation, verifying the correctness of the hard acceleration IP core through a simulation waveform, and finally exporting a hard acceleration IP core embedded system project. According to the method, the development efficiency is improved, the project period is shortened, the hardware area is saved, and the calculation precision and the communication rate are improved.

Description

technical field [0001] The invention relates to a hardware acceleration technology of a moving target detection (MTD) algorithm in the field of missile-borne radar, and is particularly suitable for the realization technology of the MTD algorithm on a missile-borne application platform with high requirements on real-time performance and signal processing precision. Background technique [0002] With the development of new guided weapons such as multi-system composite, multi-spectrum composite radar seeker, digital array and other new system radar seekers, various new algorithms have been proposed, and the amount of calculation in the digital signal processing part is also increasing. At the same time, floating-point processing is basically required, so most domestic DSP processors are used, and the time stays at the ms level, so it is difficult to further improve performance. [0003] The MTD algorithm of the domestic missile-borne pulse Doppler radar is designed and realized...

AI Technical Summary

Problems solved by technology

It has two disadvantages. One is that DSP is a sequentially executed processor. The MTD algorithm needs to be cycled hundreds or even thousands of times in the for loop, and each algorithm module in the for loop has data dependencies. Multi-core processors can only accelerate processing of data in blocks, and the acceleration effect is limited

The second is that the on-chip storage space of the DSP is limited, and the MTD data must be stored in the external DDR for processing, which increases the additional data read and write time, and the read and write time is limited by the performance of the DDR chip

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