PTP clock synchronization system and clock synchronization method

Abstract

The invention discloses a PTP clock synchronization system. The system includes a master clock board and a slave clock board; a plurality of service single boards which are used for receiving a masterclock signal output by the master clock board and a slave clock signal output by the slave clock board; and a backboard which is used for forming signal connection leads among the master clock board,the slave clock board and the service single boards. Each service single board comprises a first clock selection unit used for determining one clock signal as a working clock signal according to thecurrent states of the master clock state signal and the slave clock state signal; and a digital phase-locked loop which is used for carrying out phase locking on the received working clock signal andthen generating an effective clock signal of a timestamp counter of the physical PHY chip. The invention also discloses a PTP clock synchronization method. According to the system and the method provided by the invention, a stable and effective clock signal can be provided for the timestamp counter of each service single board PHY chip in the clock board switching process.

Description

technical field [0001] The present invention relates to clock synchronization, in particular to a PTP (Precision Time Protocol, precision time synchronization protocol) clock synchronization system and clock synchronization method, belonging to the technical field of communication. Background technique [0002] In the PTP device, there is a TScounter (timestamp counter, time stamp counter) inside the physical PHY chip of each service board on the device, and this counter is used to add time stamps to the PTP messages of the outbound and inbound ports of the service board . PTP packets can enter from any port of any service board on the device, and can be sent out from any port. The time stamp is used to record the arrival time and departure time of the PTP packet. The counting values ​​are equal, that is, synchronous, and the PTP function of the whole machine can run normally. [0003] In the prior art, PTP devices are used for timing service in the entire network, and req...

AI Technical Summary

Problems solved by technology

[0004] However, in the prior art, usually the main clock board and the slave clock board transmit clock signals to each service board through the backplane leads, and the master clock board, the slave clock board, each business board and the backboard are all connected through the lead wires of the backplane. The pins are connected to realize signal connection, and each pin is made of metal material, so it has a great influence on the signal in the process of realizing contact and separation, especially for the main clock board and the slave clock board, the plugging process needs to be carried out by the master clock. The switching of the signal and the slave clock signal, the change of the clock status signal lags behind the change of the clock signal itself, the entire clock synchronization system perceives the insertion / pulling action of the master clock card or the slave clock card, and then the master or slave clock status signal Change, which also affects the delay time of the master-slave clock switching process

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