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A system for testing the reply protection monotonic counter rpmc

A technology for protecting monotone and counters, applied in the field of testing

Active Publication Date: 2020-07-24
XTX TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] The memory chip containing the enhanced mechanism of RPMC (Replay Protection Monotonic Counter) needs to communicate with the host during the development and verification phase to test the integrity and robustness of the RPMC function, and the host with this RPMC function is Intel Computer motherboards, mobile phones, etc., are all tested and verified through FPGA boards during the development stage, so testers cannot test RPMC with test instructions at will.

Method used

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  • A system for testing the reply protection monotonic counter rpmc
  • A system for testing the reply protection monotonic counter rpmc

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Embodiment Construction

[0040] It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0041] refer to figure 1 , figure 1 It is a schematic structural diagram of an embodiment of a system for testing RPMC in the present invention. In one embodiment, the system that RPMC is tested comprises: upper computer, lower computer and the storage chip that contains RPMC;

[0042] The upper computer is used to: receive user operations, and encrypt and calculate the first test command triggered by the user operation through the HMAC algorithm to obtain a first message authentication code, and perform the first test command and the first message Edit the authentication code to obtain a first message, and send the first message to the lower computer, where the first message is a message that can be identified by the communication interface between the upper computer and the lower computer;

[0043] In this exampl...

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PUM

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Abstract

The invention provides a system for testing RPMC. The system includes: an upper computer, a lower computer, and a memory chip containing RPMC. Users can operate on the upper computer to generate various test instructions, and send them to the memory chip containing RPMC through the lower computer. The chip is used for testing the RPMC in the chip. Through the present invention, any test instruction can be flexibly generated based on user operations for functional testing or robustness testing of the RPMC, and has the advantages of flexible testing and full coverage of test cases.

Description

technical field [0001] The invention relates to the technical field of testing, in particular to a system for testing the response protection monotone counter RPMC. Background technique [0002] The memory chip containing the enhanced mechanism of RPMC (Replay Protection Monotonic Counter) needs to communicate with the host during the development and verification phase to test the integrity and robustness of the RPMC function, and the host with this RPMC function is Intel Computer motherboards, mobile phones, etc., are all tested and verified through FPGA boards during the development stage, which prevents testers from randomly issuing test instructions to test RPMC. Contents of the invention [0003] The main purpose of the present invention is to provide a system for testing RPMC, aiming at solving the above-mentioned technical problems existing in the prior art. [0004] In order to achieve the above object, the embodiment of the present invention provides a kind of sy...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F21/57G11C29/56
CPCG06F21/577G11C29/56004G11C29/56016G11C2029/5602
Inventor 虞安华徐光明黄亚龙
Owner XTX TECH INC
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