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RAID path switching device in SSD master control

A channel switching, one-way technology, applied in the direction of instrumentation, electrical digital data processing, etc., can solve problems such as poor flexibility, inability to select channels for application requirements, single hardware channel design, etc., to achieve simple form, continuous data flow, and exert computing efficiency Effect

Active Publication Date: 2020-05-12
SHANDONG SINOCHIP SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the patents "A RAID Active Acceleration Device in SSD Master Control" and "A RAID Passive Acceleration Device in SSD Master Control" disclose the method of implementing RAID inside the SSD master control chip, both of them are single Hardware channel design, unable to select the corresponding channel according to application requirements, poor flexibility

Method used

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  • RAID path switching device in SSD master control
  • RAID path switching device in SSD master control
  • RAID path switching device in SSD master control

Examples

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Embodiment 1

[0040] This embodiment discloses a RAID path switching device in the SSD master control, which realizes that data can be selected from six paths to flow into and out of the RAID accelerator in a task, and the source data flows in, and the parity data flows out.

[0041] The data input interface of the RAID path includes a private interface (private interface), the AXI master port, and the AXIslave port, and the data output interface of the RAID path includes the AXI master port and the AXI slave port.

[0042] There are 6 RAID paths, namely: private interface to AXI slave port (p2s), private interface to AXI master port (p2m), AXI master port to AXI master port (m2m), AXI master port to AXI slave port (m2s) , AXI slave port to AXI slave port (s2s), AXI slave port to AXI master port (s2m).

[0043] The RAID path switching device described in this embodiment includes three modules: ARBITER, DMA and IMA. Among them, ARB is responsible for opening up the specified data path accor...

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Abstract

The invention discloses an RAID path switching device in SSD master control. The device comprises an ARBITER module, a DMA module and an IMA module. The ARBITER module is responsible for opening a specified data path according to configuration requirements, and the DMA module is responsible for controlling data interaction between the ARBITER module and an AXI master port, sending a read-write command to the AXI master port and converting an AXI data form into an internal data format; and the IMA is responsible for controlling data interaction between the ARBITER module and an AXI slave port,analyzing a command from the AXI slave port and converting an AXI data form into an internal data format. The RAID is realized in an SSD main control chip, different paths can be selected in differentworking modes according to system conditions, and the flexibility is high.

Description

technical field [0001] The invention relates to a RAID path switching device, in particular to a RAID path switching device in an SSD main control. Background technique [0002] In the process of reading and writing to SSD, when reading data from Flash particles, if ECC error correction fails, and operations such as read re-try cannot read correct data, then it is necessary to consider how to restore data. RAID technology can give full play to the array advantages of storage chips, provide fault tolerance to ensure data security, and can continue to work in the event of a problem with a storage unit. [0003] The current RAID is generally implemented outside the SSD main control chip. Although the patents "A RAID Active Acceleration Device in SSD Master Control" and "A RAID Passive Acceleration Device in SSD Master Control" disclose the method of implementing RAID inside the SSD master control chip, both of them are single The hardware channel design cannot select the corr...

Claims

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Application Information

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IPC IPC(8): G06F13/16G06F13/28
CPCG06F13/1668G06F13/28Y02D10/00
Inventor 王运哲
Owner SHANDONG SINOCHIP SEMICON
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