Memory resource static deployment system and method

Abstract

The invention provides a memory resource static deployment system, comprising a memory resource obtaining component which is used for obtaining the memory resource quantity of each computing device, alife cycle acquisition component which is used for acquiring the life cycle of each logic output cache of each task node from the start of written data to the overwriting of the data on the basis ofall topological paths to which each task node of the task relationship topological graph to be deployed on the plurality of computing devices belongs, a minimum data pipeline interval searching component which is used for searching a minimum data pipeline interval suitable for the system between 0 and the maximum floating point operation value, and a memory pool number allocation component which is used for rounding up the quotient obtained by dividing the acquired life cycle of each logic output cache by the minimum data flow interval to obtain an integer so as to allocate the memory pools ofthe integer parts to the corresponding logic output caches.

Description

technical field [0001] The present disclosure relates to a system for statically deploying memory resources of a data processing device and a method thereof, and more specifically, the present disclosure relates to a system and method for statically deploying memory resources of a statically distributed stream data processing device. Background technique [0002] With the development of machine learning and the gradual deepening of artificial neural network research, the concept of deep learning has been widely concerned and applied. Since the data processing performed by deep learning is mostly to perform a large number of repetitive calculations, people often use co-processors, such as GPU, TPU and CPU, to perform this deep learning data processing. [0003] Although the existing parallel processing methods have improved the data processing speed, the speed of data transfer between devices has not been qualitatively improved compared with the traditional CPU cluster. For e...

AI Technical Summary

Problems solved by technology

However, due to the large number of parameter interactions between each other in the process of data parallelism or model parallelism, because the schedulers of each thread run independently, they cannot know each other's running status, which will cause some threads Insufficient memory resources may occur during operation

If each independent thread interacts with each other's state, this will increase the complexity of each thread control, which will lead to a very high order of interaction overhead, which will seriously affect the learning efficiency of the model

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