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Memory

A technology of memory and resistive memory, which is applied in the field of memory, can solve the problems of increasing system complexity, increasing cascading costs, consuming printed circuit board resources, etc., and achieving the effect of increasing scalability and system flexibility

Inactive Publication Date: 2020-03-06
北京新忆科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, the added master-slave selection chip not only increases the cost of cascading, but also increases the complexity of the system. At the same time, the chip selection signal will also consume printed circuit board resources, further increasing the cost of cascading

Method used

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Embodiment Construction

[0016] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0017] The memory proposed according to the embodiments of the present invention will be described below with reference to the accompanying drawings.

[0018] figure 1 It is a schematic structural diagram of a memory according to an embodiment of the present invention.

[0019] Such as figure 1 As shown, the memory 100 is a resistive variable memory with a serial peripheral interface, including: a plurality of memory chips 110 , cascaded control chips 120 and packaging components 130 .

[0020] Among them, cascading among mult...

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Abstract

The invention discloses a memory. The memory is a resistive random access memory with a serial peripheral interface, and comprises a plurality of memory chips, a cascade control chip and a packaging assembly; the plurality of memory chips are cascaded; the cascade control chip is in bonding connection with the plurality of storage chips so as to determine a target storage chip in the plurality ofstorage chips according to the input and control the target storage chip to execute a corresponding action; and the packaging assembly is used for packaging the plurality of storage chips and the cascade control chip. According to the invention, user does not need to increase the areas of the control chip and the printed circuit board at a system level to realize cascade connection of the storagechips. A low-capacity storage chip can be quickly and efficiently packaged into a high-capacity chip, and a plurality of packaged chips can be cascaded on a system circuit board, so that the storage expandability and the system flexibility of the system are improved.

Description

technical field [0001] The invention relates to the technical field of memory chip cascading, in particular to a memory. Background technique [0002] In related technologies, the cascading of multiple memory chips is often realized by adding a master-slave selection chip in the system, specifically: the master-slave selection chip identifies the currently needed memory chip according to the address or other signals, and in order to ensure that only In response to the memory chips currently required, an independent chip select signal needs to be set for each memory chip, so as to realize the cascade connection of multiple memory chips, thereby realizing the expansion of capacity. [0003] However, the added master-slave selection chip not only increases the cost of cascading, but also increases the complexity of the system. At the same time, the chip selection signal will also consume printed circuit board resources, further increasing the cost of cascading. Contents of th...

Claims

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Application Information

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IPC IPC(8): H01L25/065H01L27/24G11C11/56
CPCH01L25/065G11C11/56H10B63/00
Inventor 马向超吴瑞仁王坤
Owner 北京新忆科技有限公司
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