Manufacturing process of low electromagnetic interference power device terminal structure

A technology that interferes with power and manufacturing process. It is used in semiconductor/solid-state device manufacturing, electrical solid-state devices, and electrical components. It can solve the problem of increasing device process steps, reducing high-frequency and high-amplitude electromagnetic interference, and increasing device switching losses. problem, to achieve the effect of alleviating EMI noise

Active Publication Date: 2020-02-28
四川民承电子有限公司
View PDF12 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In terms of electromagnetic interference (EMI) suppression technology, one is to reduce high-frequency and high-amplitude electromagnetic interference from the perspective of circuit conduction. For example, through the design of EMI filters, common-mode interference and differential-mode interference can be effectively suppressed, but only Limited to filtering out high-frequency clutter in a certain frequency band
The second is to improve the parasitic capacitance from the aspect of device design, but it is easy to increase the switching loss of the device or increase the process steps of the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing process of low electromagnetic interference power device terminal structure
  • Manufacturing process of low electromagnetic interference power device terminal structure
  • Manufacturing process of low electromagnetic interference power device terminal structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] Hereinafter, the terminal structure of the low electromagnetic interference power device of the present invention will be described in detail with reference to exemplary embodiments.

[0015] figure 1 A schematic flow chart of an exemplary embodiment of the manufacturing process of the low electromagnetic interference power device terminal structure of the present invention is shown.

[0016] Such as figure 1 As shown, in an exemplary embodiment of the present invention, the manufacturing process of the low electromagnetic interference power device terminal structure includes the following steps:

[0017] S01, growing a first conductivity type semiconductor epitaxial layer on a first conductivity type semiconductor substrate. The first conductivity type semiconductor epitaxial layer may have a predetermined withstand voltage requirement and a predetermined thickness, for example, the predetermined withstand voltage requirement may be 600V or higher; the predetermined ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a manufacturing process of a low electromagnetic interference power device terminal structure. The terminal structure manufactured by the process comprises a metallized drain electrode, a first conductive type semiconductor substrate and a first conductive type semiconductor epitaxial layer, a second conductive type semiconductor main junction, a second conductive type semiconductor equipotential ring, a first conductive type cut-off ring, a second conductive type semiconductor field limiting ring, a first dielectric layer, a second dielectric layer, a third dielectric layer, a conductive field plate, a resistor and a metallized source electrode which are stacked from bottom to top. In the invention, an HK dielectric layer can be introduced between the field limitingring and the field plate. An MIS capacitor structure is formed by the semiconductor field limiting ring, the HK dielectric layer and the field plate and is connected in series with an adjacent polycrystalline silicon resistor so that an RC absorption network is formed between high potentials of the source electrode and the drain electrode, dv / dt and di / dt generated by a power device in a fast switch can be effectively inhibited, and an EMI noise is relieved.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, in particular to a manufacturing process of a power device terminal structure. Background technique [0002] Usually, the typical application environment of power devices is switching power supply. In order to meet the miniaturization requirements of switching power supply, its switching frequency and power density are constantly increasing. Modularization and functional integration can improve the power density of electronic components, but it will also produce more and more The increasingly complex internal electromagnetic environment. When the power device is in the fast switching state, its voltage and current change sharply in a short time, resulting in high dv / dt and di / dt, which become a strong source of electromagnetic interference. [0003] In terms of electromagnetic interference (EMI) suppression technology, one is to reduce high-frequency and high-amplitude electromagnetic ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/82H01L23/552H01L27/02
CPCH01L21/82H01L27/0288H01L23/552
Inventor 蔡少峰任敏高巍李科陈凤甫邓波贺勇蒲俊德
Owner 四川民承电子有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products