Tin oxide-based thin film transistor based on plasma enhanced atomic layer deposition gate insulating layer and preparation method

Abstract

The invention belongs to the technical field of thin film transistors, and relates to a tin oxide-based thin film transistor based on a plasma enhanced atomic layer deposition gate insulating layer, which comprises a substrate, a gate, a gate insulating layer, an active layer, a source and a drain arranged in sequence, wherein the gate insulating layer is an aluminum oxide thin film prepared through plasma enhanced atomic layer deposition, and the active layer is a silicon-doped tin oxide thin film prepared through magnetron sputtering deposition. The tin oxide-based thin film transistor adopts a plasma enhanced atomic layer deposition method to prepare aluminum oxide with a high dielectric constant as a gate insulating layer, an amorphous silicon doped tin oxide semiconductor material isused as an active layer material, the interface defect mode of the active layer / gate insulating layer and the turn-on voltage of the device are reduced, and the mobility and the stability of the device are remarkably improved. The invention further provides a preparation method for the tin oxide-based thin film transistor based on the plasma enhanced atomic layer deposition gate insulating layer.

Description

technical field [0001] The invention belongs to the technical field of thin film transistors, and relates to a tin oxide-based thin film transistor based on plasma-enhanced atomic layer deposition gate insulating layer and a preparation method. Background technique [0002] At present, flat panel display technology is developing rapidly, and large-size, high-resolution, high-refresh rate displays have become the mainstream. Among them, the core technology of the flat panel display industry is thin-film transistor (TFT) backplane technology, and it is very important to improve the performance of TFT and reduce the production cost. In traditional TFTs, silicon oxide or silicon nitride is used as the gate insulating layer. Due to their low dielectric constant (approximately 3.9), low capacitance typically results in low device mobility and low "on" current. The insulating layer material with high dielectric constant has the advantages of high dielectric constant, relatively l...

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Problems solved by technology

Due to their low dielectric constant (approximately 3.9) and low capacitance, typically resulting in low device mobility and low "on" current

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