Semiconductor device and formation method thereof

Abstract

The invention provides a semiconductor device and a formation method thereof. The formation method comprises the following steps: providing a substrate; etching a first dielectric layer and a barrierlayer to expose a first metal layer so as to form a switch hole; etching and cleaning the switch hole, while the first metal layer exposed out of the switch hole is laterally etched; and forming an insulating layer which at least covers the surface of the switch hole and fills the area where the first metal layer is laterally etched. The area where the first metal layer is laterally etched is filled with the insulating layer, thus avoiding the formation of gaps and improving the stability and the reliability of the contact resistance in the switch hole. The insulating layer of the side wall ofthe switch hole separates the first metal layer of the bottom circumferential ring of the switch hole to prevent it from being damaged, and the insulating layer covers the side wall of the switch hole so that the flatness of the switch hole is high, the uniformity of film deposition in the switch hole and the metal layer filling the switch hole is improved and the thermal expansion and stress areenabled to be uniform.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit manufacturing, and in particular relates to a semiconductor device and a forming method thereof. Background technique [0002] Metal interconnection technology is one of the important technologies in the manufacture of integrated circuits (ICs). Aluminum (Al) is easy to form patterns and has been widely used in the metal wiring of integrated circuits. Copper (Cu) has the characteristics of good electrical conductivity, low resistivity, good resistance to electromigration and stress-free migration. Copper metal layer is deposited on the aluminum metal layer to realize copper electrical connection to aluminum, copper and aluminum are combined and distributed in their respective appropriate positions as the interconnection lines of integrated circuits, taking the advantages of both copper and aluminum, avoiding aluminum Disadvantages such as poor resistance to electromigration and the dis...

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Problems solved by technology

[0004] On the other hand, if figure 2 As shown, the Bosch process is used to form the TSV 004. The Bosch process brings poor side wall flatness, that is, the inner wall (side) of the TSV 004 (switch hole) has poor flatness (such as wavy), which will Cause subsequent inhomogeneity of film deposition and metal layer filling (such as copper metal layer filling) switch holes in through-silicon holes 004 (switch holes), as well as uneven thermal expansion and stress

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