Phase synchronization method, device and terminal

Abstract

The present invention provides a phase synchronization method, device and terminal, which relate to the technical field of time service. The phase synchronization method includes: sending a first clock signal to a receiving device; detecting the first clock signal and the third clock sent by a zero-delay module The phase difference of the signal; through the zero delay of the second clock signal, and the second clock signal is fed back to the timing device; the ratio of the first path delay and the second path delay is also set as a preset value, according to the preset Set the value and the phase difference to obtain the phase-shifting phase value; realize the phase-shifting of the second clock signal according to the phase-shifting phase value, thereby realizing the phase alignment of the first clock signal and the output signal; the present invention can realize the output signal of the timing device and the output of the receiving device The phase synchronization of the signal reduces the error introduced by the phase and improves the timing accuracy.

Description

technical field [0001] The present invention relates to the technical field of time service, in particular to a phase synchronization method, device and terminal. Background technique [0002] Time synchronization is a basic requirement of communication products. The 5G communication that is about to be commercialized requires the accuracy of time synchronization to reach ns or even sub-ns level. The realization of time synchronization in the communication equipment requires the cooperation of the clock card (time provider or Master) and the line card (receiver or Slave). At present, the basic method to achieve time synchronization is: the time provider sends the initial time to the receiver; The party sends the current time to complete the table pairing. At present, the frequency signal is usually sent to the receiver through timing, and the receiver uses PLL (Phase Lock Loop) to lock the frequency of the receiver to achieve time synchronization. However, the PLL in this...

AI Technical Summary

Problems solved by technology

At present, the frequency signal is usually sent to the receiver through timing, and the receiver uses PLL (Phase Lock Loop) to lock the frequency of the receiver to achieve time synchronization. However, the PLL in this method can only guarantee frequency synchronization but not phase synchronization. There is an error introduced by the phase difference between the party and the receiver

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