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SRAM, method for manufacturing same, and electronic device

A manufacturing method and technology of fins, which are applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of serious local changes of transmission gate transistors and asymmetrical layout of SRAMs, etc.

Active Publication Date: 2019-12-13
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Pass-gate transistors tend to have large Vth variations, mainly due to SRAM local layout asymmetry, which makes pass-gate transistors and pull-down transistors suffer from Shallow Trench Isolation (STI) and Epitaxy (Epi) differs in stress, resulting in more severe local variations in pass-gate transistors

Method used

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  • SRAM, method for manufacturing same, and electronic device
  • SRAM, method for manufacturing same, and electronic device
  • SRAM, method for manufacturing same, and electronic device

Examples

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Embodiment 1

[0080] Below, refer to figure 2 , Figure 3A to Figure 3D as well as Figure 4A to Figure 4C The manufacturing method of the SRAM of the present invention is described in detail.

[0081] As an example, the manufacturing method of the SRAM of the present invention includes:

[0082] First, perform step 1, such as Figure 3A As shown, a semiconductor substrate 200 is provided, on which a first fin structure 2011, a second fin structure 2012, a third fin structure 2013 and a fourth fin structure 2014 are formed, wherein adjacent The projection of the fin structure on the surface of the semiconductor substrate 200 is symmetrical about the center line between the two, for example, as Figure 3A As shown, the projections of the first fin structure 2011 and the second fin structure 2012 on the surface of the semiconductor substrate 200 are symmetrical about the center line 11 between them, and the third fin structure 2013 and the fourth fin structure 2014 are in The projection...

Embodiment 2

[0163] The present invention also provides a SRAM prepared by the method of the first embodiment above. Below, refer to Figure 3D and Figure 4C The structure of the SRAM of the present invention is described in detail, and since the SRAM device in this embodiment is prepared by the aforementioned method, some same structures will not be described repeatedly.

[0164] As an example, such as Figure 3D and Figure 4C As shown, the SRAM of the present invention includes a semiconductor substrate 200 .

[0165] Exemplarily, a first fin structure 2011, a second fin structure 2012, a third fin structure 2013 and a fourth fin structure 2014 are formed on the semiconductor substrate 200, wherein the adjacent fin structures The projection on the surface of the semiconductor substrate 200 is symmetrical about the center line between the two, for example, as Figure 3A As shown, the projections of the first fin structure 2011 and the second fin structure 2012 on the surface of the...

Embodiment 3

[0195] Another embodiment of the present invention also provides an electronic device, including the aforementioned SRAM, which is prepared according to the aforementioned method.

[0196] The electronic device of this embodiment can be any electronic device such as a mobile phone, a tablet computer, a notebook computer, a netbook, a game console, a TV set, a VCD, a DVD, a navigator, a digital photo frame, a camera, a video camera, a recording pen, MP3, MP4, PSP, etc. Product or equipment, but also any intermediate product including electrical circuits. The electronic device of the embodiment of the present invention has better performance due to the use of the above-mentioned SRAM.

[0197] in, Figure 6 An example of a mobile phone handset is shown. The mobile phone handset 300 is provided with a display portion 302 included in a housing 301, operation buttons 303, an external connection port 304, a speaker 305, a microphone 306, and the like.

[0198]Wherein, the mobile ...

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Abstract

The present invention provides a SRAM, a method for manufacturing the same, and an electronic device. The method includes: providing a semiconductor substrate on which a first fin structure and a second fin structure are formed; forming, on the semiconductor substrate, a first dummy gate structure and a second dummy gate structure spaced apart from each other, wherein the first dummy gate structure spans the first fin structure and the second fin structure, and the second dummy gate structure spans a region of the second fin structure adjacent to a first transmission gate transistor region; forming a stress epitaxial layer in the second fin structure on both sides of the first dummy gate structure and in the second fin structure on both sides of the second dummy gate structure; removing the first dummy gate structure and the second dummy gate structure to form a first gate groove and a second gate groove respectively; removing the part of the second fin structure exposed in the secondgate groove to form a first trench; and forming a first metal gate structure and a second metal gate structure.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an SRAM, a manufacturing method thereof, and an electronic device. Background technique [0002] In the field of semiconductor memory technology, with the continuous development of microelectronics technology, memory presents a development trend of high integration, high speed, and low power consumption. Compared with dynamic random access memory (DRAM), static random access memory (SRAM) can save internally stored data without refreshing the circuit, and unlike DRAM, it does not need to be refreshed and charged at regular intervals to maintain Internal data, therefore, SRAM has been widely used in the field of storage in recent years. [0003] As fin field effect transistors (FinFETs, “fin transistors” for short) are applied to logic devices, some designs use fin field effect transistors as transistor devices of SRAM cells to improve the density and performance of SRAM. ...

Claims

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Application Information

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IPC IPC(8): H01L21/8244H01L27/11
CPCH10B10/12
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP
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