Elastic packaging structure for semiconductor chip

Abstract

The invention provides an elastic packaging structure for a semiconductor chip. The elastic packaging structure comprises an upper electrode, a lower electrode, an annular packaging structure and a plurality of chip subunits, wherein the plurality of chip subunits are arranged between the upper electrode and the lower electrode; the annular packaging structure is arranged on the side edges of theupper electrode and the lower electrode in a sealed mode and forms a closed tube shell structure with the upper electrode and the lower electrode. According to the invention, the packaging cost can beeffectively reduced, the environmental adaptability of the semiconductor chip is improved, the service life of the semiconductor chip is prolonged, the universality is high, the packaging cost of semiconductor chip failure can be reduced to the greatest extent, and the packaging yield of the semiconductor chip is remarkably improved. The tube shell structure is a sealed structure, so the adaptability of the semiconductor chip to the application environment can be greatly improved; the tube shell structure is filled with the silica gel, so the insulation and voltage resistance of the semiconductor chip can be greatly improved, the voltage class of the semiconductor chip is higher, and the reliability of the semiconductor chip is higher.

Description

technical field [0001] The invention relates to the technical field of power semiconductors, in particular to an elastic packaging structure for semiconductor chips. Background technique [0002] The packaging structure of semiconductor chips is divided into rigid packaging and elastic packaging according to the pressure contact method. Among them, in the rigid package, both sides of the chip are in contact with metal hard surfaces. This type of structure is simple, but it has high requirements for chip thickness consistency and pressure uniformity. It also has high requirements for the surface processing accuracy of internal structural parts and heat sinks used in applications. strict. As the device capacity increases and the number of internal chips increases, the pressure and crimping area will increase accordingly, making it more difficult to realize large-area high-precision processing. Due to the hard contact between the chip and the metal structure, the pressure dif...

AI Technical Summary

Problems solved by technology

[0004] In order to overcome the disadvantages of high packaging cost, poor environmental adaptability and short service life in the above-mentioned prior art, the present invention provides an elastic packaging structure for semiconductor chips, including an upper electrode, a lower electrode, a ring-shaped packaging structure and a plurality of chip sub-structures. unit; a plurality of chip sub-units are arranged between the upper electrode and the lower electrode; the annular packaging structure is sealed and arranged on the side of the upper electrode and the lower electrode and forms a closed shell structure with the upper electrode and the lower electrode, which can effectively reduce the packaging cost, improve the environmental adaptability of semiconductor chips, and prolong the service life of semiconductor chips

Images