Synaptic transistor, synaptic device, manufacturing method of synaptic transistor and synaptic device, and operation array

Abstract

The invention provides a synaptic transistor, a synaptic device, a manufacturing method of the synaptic transistor and the synaptic device, and an operation array. The material of a channel layer of the device or the transistor is a semiconductor material with ferroelectric characteristics. By use of ferroelectric characteristics of a semiconductor material, a voltage is applied to the channel layer through a grid electrode or a source electrode and a drain electrode, so the ferroelectric domain in the channel layer is polarized and overturned and the conductivity of the channel layer is changed due to the change of the ferroelectric domain. Thus, the synaptic behaviors can be simulated through the change of the conductivity, so it is achieved that one synaptic behavior is simulated by using one transistor or device, the miniaturization and integration of the chip are facilitated, compatibility with the existing silicon-based technology is achieved, and the power consumption can be reduced.

Description

technical field [0001] The invention relates to the fields of artificial intelligence and semiconductor devices and manufacturing, in particular to a synaptic transistor, a device, a manufacturing method thereof, and an operation array. Background technique [0002] The artificial neural network is an algorithmic mathematical model that imitates the behavioral characteristics of the biological brain, especially the human brain, and synapses, and performs distributed parallel information processing. It can be widely used in the field of artificial intelligence. [0003] In the process of neuromorphic computing, a large number of matrix operations are involved. At present, the operation process is mainly realized by computer processors and memories. However, with the continuous increase of matrix scale, it poses a challenge to the computational efficiency of computer processors. At present, memory-computing integrated processing chips for neuromorphic computing have emerged a...

AI Technical Summary

Problems solved by technology

However, in this way, simulating a synaptic behavior often requires multiple CMOS transistors, which makes the chip less integrated and consumes more power.

In addition, in some studies and applications, devices that use a transistor to simulate a synaptic behavior have also been proposed, such as memristor, phase-change RAM, spin RAM, iron Electric memory (ferroelectic RAM), these devices have the characteristics of simple structure and process, but the working speed of the device is not ideal

In addition, in some studies, it is also proposed to use MoO 3 , graphene, WSe 2 Three-terminal synaptic transistors are prepared with two-dimensional materials such as channel, but the gate dielectric still uses ionic liquid or solid electrolyte, and these devices are difficult to miniaturize and integrate

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