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Super-junction lateral voltage withstanding region with groove and having impedance field plate

A lateral withstand voltage, field plate technology, applied in semiconductor devices, electrical components, circuits, etc., can solve the problems of destroying the charge balance condition, the advantages of superjunction technology cannot be fully exerted, and destroying the surface electric field distribution in the withstand voltage region. The effect of optimizing breakdown voltage and specific on-resistance, device width reduction, and high resistivity

Active Publication Date: 2019-09-06
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the withstand voltage zone reverses the withstand voltage, the cathode 07 is connected to a high potential, and the anode 05 is connected to a low potential, and a longitudinally changing potential difference will be formed on the tank capacitance; specifically, on the surface of the tank, this potential difference is O 1 with O 4 The voltage between is close to the reverse voltage between the cathode and the anode; at the bottom of the tank, this potential difference is O 2 with O 3 The voltage between them is close to zero; the longitudinally changing potential difference on the tank capacitance will induce a corresponding amount of longitudinally changing charges on the two plates, and these charges will destroy the surface electric field distribution in the withstand voltage region; especially, for the traditional As far as the super junction grooved lateral withstand voltage region is concerned, these charges destroy the charge balance conditions between the P-type drift region 08 and the N-type drift region 02, so that the advantages of super-junction technology cannot be fully utilized

Method used

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  • Super-junction lateral voltage withstanding region with groove and having impedance field plate
  • Super-junction lateral voltage withstanding region with groove and having impedance field plate
  • Super-junction lateral voltage withstanding region with groove and having impedance field plate

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Embodiment 1

[0028] This embodiment provides a superjunction grooved lateral voltage withstand region with a resistive field plate, the structure of which is as follows image 3 As shown; including: substrate 01, N-type drift region 02, insulating medium tank 03, P+ anode region 04, anode 05, N+ cathode region 06, cathode 07, P-type drift region 08 and resistive field plate 09; wherein, The N-type drift region 02 is disposed on the substrate 01, the P-type drift region 08 is disposed in the N-type drift region 02, the insulating dielectric groove 03 is disposed in the P-type drift region 08, and the P+ anode region 04 and N+ cathode region 06 are respectively arranged on both sides of the insulating medium tank 03, and are located above the N-type drift region 02 and the P-type drift region 08, the anode 05 is arranged on the P+ anode region 04, and the cathode 07 is arranged On the N+ cathode region 06 ; the resistive field plate 09 is set between the insulating medium groove 03 and the P...

Embodiment 2

[0041] This embodiment provides another superjunction grooved lateral voltage withstand region with a resistive field plate, the structure of which is as follows Figure 12 Shown; Its difference with embodiment 1 is: also be provided with a layer of insulating dielectric buffer layer 10 between described resistive field plate 09 and P-type drift region; Described insulating dielectric buffer layer 10 can adopt and insulating dielectric groove ( 03) is filled with the same dielectric material, or another dielectric material, in order to play a role of buffer protection for the implementation of the resistive field plate.

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Abstract

The invention belongs to the field of a semiconductor power device, relates to a lateral voltage withstanding region and specifically provides a super-junction lateral voltage withstanding region witha groove and having an impedance field plate. A junction edge terminal or a lateral semiconductor power device applied to a semiconductor power device comprises an LDMOS (Lateral Double-Diffused MOSFET) and an LIGBT (Lateral Insulated Gate Bipolar Transistor). The impedance field plate is added between the insulation medium groove in the super-junction lateral voltage withstanding region with thegroove and a semiconductor drift region having a super-junction structure to modulate surface electric field distribution under a reverse withstand voltage state to make the electric field more uniform, thereby optimizing the relationship between breakdown voltage and specific on-resistance.

Description

technical field [0001] The invention belongs to the field of semiconductor power devices, and relates to a lateral voltage-resistant region, particularly a lateral voltage-resistant region with a groove structure; it can be applied to junction edge terminals of semiconductor power devices, or lateral semiconductor power devices include LDMOS (Lateral Double- Diffused MOSFET), LIGBT (Lateral Insulated Gate Bipolar Transistor), etc. Background technique [0002] Lateral semiconductor power devices, such as LDMOS (Lateral Double-Diffused MOSFET, LDMOS), are widely used in power integrated circuits, but they usually require a long lateral withstand voltage region to withstand high reverse withstand voltage, occupying the chip The area is huge. For this reason, a kind of transverse pressure-resistant zone with grooved structure (herein referred to as "ordinary grooved transverse pressure-resistant zone") has been proposed, such as figure 1 As shown; the withstand voltage region...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/40
CPCH01L29/0611H01L29/0615H01L29/0684H01L29/407H01L29/405
Inventor 程骏骥陈为真
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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