Fractional N frequency division circuit and method applied to frequency synthesizer

Abstract

In order to solve the structure parasitic problem of a fractional frequency division circuit of a Sigma-delta modulator adopting a MASH1-1-1 structure, the invention provides a fractional N frequencydivision circuit and method applied to a frequency synthesizer. The fractional N frequency division circuit comprises a MASH1-1-1 Sigma-delta modulator, a frequency division counting circuit Ncount, afront P / (P + 1) prescaler, a pseudo-random sequence generation circuit Ditcher and an adder; the pseudorandom sequence generation circuit Ditcher is used for generating an n-bit pseudorandom sequenceand sending the n-bit pseudorandom sequence into the n-bit adder I; and the n-bit adder I is used for summing the small numerical value N _ frac [n-1: 0] received by the fractional N frequency division circuit and the n-bit pseudorandom sequence in each clock period, and sending a summing result corresponding to each clock period to the input end of the MASH1-1-1 Sigma-delta modulator.

Description

technical field [0001] The invention belongs to the technical field of frequency synthesizers, and relates to a fractional-N frequency division circuit and method applied to frequency synthesizers. Background technique [0002] When the RF chip is doing signal processing, the RF chip needs to filter, amplify, and down-convert the received signal, and then perform A / D conversion on the analog signal obtained by the down-conversion, thereby generating a digital signal that can be processed by the baseband circuit. The local oscillator frequency for down-conversion is generated by a frequency synthesizer after multiplying the reference frequency generated by a crystal oscillator, and in the frequency synthesizer, the frequency divider is the key to providing multiple high-precision frequency signals. The frequency divider in the traditional frequency synthesizer is an integer frequency division structure. In order to generate adjacent channel frequencies with small frequency in...

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Problems solved by technology

The frequency divider in the traditional frequency synthesizer is an integer frequency division structure. In order to generate adjacent channel frequencies with small frequency intervals, the reference frequency is required to be small and the frequency division coefficient is large, so the anti-noise ability is poor; here Basically, a fractional frequency divider based on Sigma-delta modulation technology has appeared, which can obtain higher frequency resolution and extremely low phase spurs, but due to the limitations of the digital circuit itself, the Sigma-delta modulation technology based The fractional frequency division circuit actually performs integer frequency division at every instant, and then realizes statistical fractional frequency division in one cycle

Due to the consideration of circuit complexity and power consumption, most circuits use the Sigma-delta modulator of the MASH1-1-1 structure, but when the input fractional value is the negative integer power of 2 or the negative integer power of these When summing and differing, this results in a finite loop problem at the output, which is a structural spur of the modulator, resulting in a glitch in the frequency domain that degrades the overall phase noise of the frequency synthesizer

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