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Memory, chip and circuit control method

A memory and storage unit technology, applied in the field of memory, can solve the problems of wasting memory area and not being effectively used, and achieve the effects of efficient utilization, performance loss reduction, and area ratio improvement

Active Publication Date: 2019-07-30
HYGON INFORMATION TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0003] The storage unit is the basic structure of the memory, and the memory generally stores data through a storage unit array composed of multiple storage units; In addition to designing storage units, redundant storage units are generally designed, so that when the storage unit is abnormal, the redundant storage unit can be used to replace the abnormal storage unit, thereby reducing the performance loss of the memory; however, if the storage unit in the memory If there is no abnormality, the redundant storage unit will become useless. It can be seen that the redundant storage unit has not been effectively utilized in the prior art, which wastes the area of ​​the memory to a certain extent

Method used

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  • Memory, chip and circuit control method
  • Memory, chip and circuit control method

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Embodiment Construction

[0077] optional, figure 1 It shows a schematic structural diagram of a traditionally designed memory. The memory is usually arranged in a matrix structure consisting of rows and columns of memory cells, so the memory can have multiple memory cell arrays, and each memory cell array can have multiple memory cells;

[0078] refer to figure 1 , The memory is designed with bit line pairs (BL and BLB), word lines (Word Line, WL), redundant word lines (indicated by Red-WL), memory cells (indicated by Cell), redundant memory cells (Red-Cell , Red-Cell can be the abbreviation of Redundancy Cell), and sense amplifier (indicated by SA); SA is connected to the data output port (Data Output, DO);

[0079] Among them, the English spelling of BL is Bit Line, which means a bit line; the bit line pair can be composed of a logically opposite bit line BL and an inverted bit line BLB; the number of bit line pairs can be multiple pairs, and the number of word lines can be multiple The number of ...

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Abstract

The embodiment of the invention provides a memory, a chip and a circuit control method. The memory comprises word line, redundant word lines, a storage unit connected with the word lines; and a redundant storage unit connected with the redundant word lines, wherein when the abnormal storage unit does not exist, the redundant storage unit is used for realizing the sense amplifier, and when an abnormal storage unit exists, at least one redundant storage unit is reserved to realize the sense amplifier, and the abnormal storage unit is replaced by using the rest target redundant storage units. According to the embodiment of the invention, on the basis of effectively utilizing the redundant storage unit, the area ratio occupied by the storage unit in the memory is improved, and the area consumption of the memory is reduced.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of memory, and in particular to a memory, a chip, and a circuit control method. Background technique [0002] Memory is a widely used device for storing data in chips. In particular, SRAM (Static Random-Access Memory) is a typical type of memory. for wide application. [0003] The storage unit is the basic structure of the memory, and the memory generally stores data through a storage unit array composed of multiple storage units; In addition to designing storage units, redundant storage units are generally designed, so that when the storage unit is abnormal, the redundant storage unit can be used to replace the abnormal storage unit, thereby reducing the performance loss of the memory; however, if the storage unit in the memory If there is no abnormality, the redundant storage unit will become useless. It can be seen that the redundant storage unit has not been effectively utilized i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/00
CPCG11C29/785G11C29/80
Inventor 黄瑞峰杨昌楷王建龙
Owner HYGON INFORMATION TECH CO LTD
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