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Electrostatic discharge protection structure and forming method and working method thereof

A technology of electrostatic discharge protection and gate structure, which is applied in the direction of circuits, electrical components, and electric solid devices, can solve the problems of poor performance of MOS tube electrostatic protection circuits, and achieve the effect of reducing the number of times and improving performance

Inactive Publication Date: 2019-07-09
HUAIAN IMAGING DEVICE MFGR CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the performance of the MOS transistor electrostatic protection circuit in the prior art is poor

Method used

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  • Electrostatic discharge protection structure and forming method and working method thereof
  • Electrostatic discharge protection structure and forming method and working method thereof
  • Electrostatic discharge protection structure and forming method and working method thereof

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Embodiment Construction

[0027] As mentioned in the background, prior art ESD protection structures perform poorly.

[0028] figure 1 It is a schematic diagram of the cross-sectional structure of an electrostatic discharge protection structure, please refer to figure 1 , the electrostatic discharge protection structure includes: a substrate 100, with a well region inside the substrate 100, the well region has first ions, and the concentration of the first ions is a first concentration; a gate structure located on the surface of the substrate 100 110; the drain doped region 131 and the source doped region 132 respectively located in the substrate 100 on both sides of the gate structure 110, the drain doped region 131 and the source doped region 132 contain second ions, the The conductivity type of the second ion is opposite to that of the first ion; the electrostatic protection doping region 140 located at the bottom of the drain doping region 131 has the first ions in the electrostatic protection dop...

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Abstract

The invention relates to an electrostatic discharge protection structure and a forming method and a working method thereof. The forming method comprises steps that a substrate is provided, and the substrate includes a first region, a second region and a third region; a first well region is formed in the substrate, and the first well region has first ions with the first concentration; a first gatestructure is formed on a surface of the second region; a first doping region is formed in the first region, and the first doping region has second ions having a conductivity type opposite to the firstions; a second doping region is formed in the third region, the second doping region has second ions with the second concentration, and the second concentration is greater than the first concentration; a third doping region is formed in the third region, the second doping region and the third doping region are arranged parallel to the first direction, the second doping region is adjacent to the third doping region, the three doping region has third ions with the third concentration, a conductivity type of the third ions is opposite to the second ions, and the third concentration is greater than the first concentration. The method is advantaged in that performance of the electrostatic discharge protection structure is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to an electrostatic discharge protection structure, a forming method and a working method thereof. Background technique [0002] ESD (Electrostatic Discharge, Electrostatic Discharge) is one of the most important reliability issues in today's integrated circuits. The ESD phenomenon can mainly cause the following damages to electronic devices: In semiconductor devices, the oxide film is broken due to dielectric breakdown. [0003] The function of the ESD protection circuit is: when the ESD pulse appears, it can provide a low-impedance discharge path, and can clamp the voltage at a certain level. The opening speed of this path to the ESD pulse is faster than that of the internal circuit, and has little impact on normal operation, including small leakage current, parasitic, latch-up, etc. In integrated circuit design, the ESD protection circuit is generally designed next to...

Claims

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Application Information

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IPC IPC(8): H01L27/02
CPCH01L27/0255H01L27/0259
Inventor 李颖华柯天麒
Owner HUAIAN IMAGING DEVICE MFGR CORP
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