Manufacturing method for field-effect tube and field-effect tube

Abstract

The invention discloses a manufacturing method for a field-effect tube and the field-effect tube. The method comprises the following steps of forming a P-type MOSFET region on a substrate, wherein theP-type MOSFET region is isolated by a shallow trench isolation area; forming a hard mask pattern in the P-type MOSFET region; forming a silicon nanowire array structure, wherein the silicon nanowirearray structure comprises multiple layers of stacked silicon nanowires; carrying out SiGe selective epitaxial growth and concentration oxidation on the silicon nanowires, and removing an oxidation layer to obtain an SiGe nanowire array structure; and sequentially forming an interface oxide layer, a ferroelectric material gate dielectric laminate and a metal gate laminate at the nanowire array structure. According to the field-effect tube, the gate control capability is greatly enhanced due to a fence structure, and the hole mobility is improved due to the PMOSFET SiGe nanowires, especially dueto the fact that a ferroelectric negative capacitance effect is introduced, the potential of the surface of a channel is amplified, so that a nanowire device has a super-steep sub-threshold slope andan improved on / off current ratio.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductors, and relates to a manufacturing method of a field effect tube and the field effect tube. Background technique [0002] As the feature size of integrated circuits becomes smaller and smaller, planar CMOS devices have encountered serious challenges, and various new device structures have emerged. The gate structure of devices has evolved from traditional planar single gates to double gates, triple gates, and completely wrapped channel. The gate-all-around structure, the gate-control ability and the ability to control the short channel effect are continuously enhanced, and the MOSFET with the nanowire gate-all-around structure (GAA) with quasi-ballistic transmission characteristics is widely used due to its strong gate control ability and the ability to reduce the size. Attach great importance to it and become a strong competitor in the technology generation of 3nm and below. However, when t...

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Problems solved by technology

So far, the reported processes for fabricating SiGe nanowires are complicated, and the Damaccus pseudo-gate process using Si / SiGe alternating epitaxy is expensive, and the size reduction of nanowires has certain limitations.

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