Matrix convolution calculation method, interface, coprocessor and system based on RISC-V architecture
A RISC-V and coprocessor technology, applied in the field of matrix convolution calculation, can solve the problems of design fragmentation, insufficient flexibility, unsatisfactory operation speed, power consumption and volume, etc.
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[0091] The technical solution will be described in detail below through a preferred embodiment and in conjunction with the accompanying drawings.
[0092] The invention provides a matrix convolution calculation method based on RISC-V architecture, an RCI interface (RISC-V Coprocessor Interface) for implementing the method, a coprocessor and an overall system. The calculation method includes a custom instruction part based on the RISC-V architecture, which defines the instruction encoding required for the matrix convolution operation.
[0093] Such as figure 1 As shown, the matrix convolution computing system based on the RISC-V architecture corresponding to the computing method includes a coprocessor, a main processor, an RCI interface for transmitting requests and feedback between the main processor and the coprocessor, and a user memory for storage;
[0094] The RCI interface defines the data channel, signal, and processing flow between the main processor and the coprocess...
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