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Surface correction structure and correction method of semiconductor structure

A semiconductor and back film technology, applied in the field of surface warpage correction structure, can solve the problems of wafer asymmetry and wafer fragmentation, and achieve the effect of improving yield and reliability

Active Publication Date: 2019-03-26
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In actual situations, due to the asymmetry of the stress on the front of the wafer, various forms of asymmetric warping of the wafer are often caused, such as saddle-shaped warping, which makes the wafer prone to fragmentation and other problems.

Method used

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  • Surface correction structure and correction method of semiconductor structure
  • Surface correction structure and correction method of semiconductor structure
  • Surface correction structure and correction method of semiconductor structure

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Embodiment Construction

[0032] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Additionally, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0033] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0034] If it is to describe the situation directly on another lay...

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Abstract

The application discloses a surface correction structure and correction method of a semiconductor structure. The surface correction structure comprises a back film and a stress layer adjacent to the back film. The back film is arranged on the surface of the semiconductor structure and is adjacent to the surface of the semiconductor structure. According to the correction structure, a flat surface is provided for the follow-up cover layer and the correction structure is suitable for surface warping with various directivity, so that the yield and reliability of the semiconductor device are improved.

Description

technical field [0001] The present invention relates to semiconductor technology, and more particularly, to a surface warp (bow) correction structure and correction method of a semiconductor structure. Background technique [0002] The development direction of semiconductor technology is the reduction of feature size and the improvement of integration. For storage devices, the improvement of the storage density of the storage device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the co...

Claims

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Application Information

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IPC IPC(8): H01L21/48H01L27/11551H01L27/11578
CPCH01L21/48H10B41/20H10B43/20
Inventor 罗世金胡明鲍琨夏志良程纪伟孙中旺张坤
Owner YANGTZE MEMORY TECH CO LTD
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