A method for realizing state quantization network in cross-array neural morphology hardware

Abstract

The invention belongs to the technical field of neural networks and relates to a method for realizing state quantization network in cross array neural morphology hardware. The method of the inventionincludes: after quantifying the parameters of an artificial neural network (weight, threshold, leakage constant, set voltage, refractory period and synaptic delay), the quantized parameters are mappedto the cross-array neural morphology hardware, and then the input data after preprocessing are sent to the cross-array neural morphology hardware to realize the state quantization network. Through state quantization, the requirements of cross-array neural morphology hardware for memory cell size, memory level, reliability and so on are effectively reduced.

Description

technical field [0001] The invention belongs to the technical field of neural networks, and relates to a method for realizing a state quantization network in cross-array neuromorphic hardware. Background technique [0002] Neuromorphic computing is used to refer to brain-derived computers, devices, and models in contrast to the prevalent von Neumann computer architecture. This biomimetic approach creates highly connected synthetic neurons and synapses that can be used for theoretical modeling in neuroscience to solve machine learning problems. [0003] Neuromorphic circuit is one of the physical realizations of the neural network model. It abstracts and simulates the biological nervous system at a high level by means of hardware, in order to achieve low power consumption, High adaptability and other characteristics. [0004] Crossbars use memristors for data storage and parallel computing and as an important component architecture of neural network nodes is to use crossbar...

AI Technical Summary

Problems solved by technology

[0007] In the currently implemented cross-array neuromorphic hardware, parameters such as synaptic weights and neuron parameters such as thresholds, leakage constants, set voltages, refractory periods, and synaptic delays require a lot of system storage resources. With the rapid expansion of circuit scale, this will inevitably become a major bottleneck of neuromorphic hardware under the condition that storage resources are relatively scarce today.

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