Method for optimizing impedance discontinuity at high-speed link capacitor

Abstract

The invention discloses a method for optimizing impedance discontinuity at a high-speed link capacitor. A high-speed link comprises a mainboard; the main board comprises a transmitting end, a capacitor and a receiving end; the emitting end is connected with the capacitor through an outgoing line L1 and a main wire L2 of the mainboard; and the capacitor is connected with the receiving end through aconnecting line L3. The method comprises the following steps of adding a transition region wire A1 between the main wire L2 and the capacitor, and adding a transition region wire A2 between the capacitor and the connecting line L3; adjusting the impedances of the transition region wires A1 and A2, and performing time domain reflectometer simulation for different impedances of the transition region wires A1 and A2; comparing impedance discontinuity conditions of the high-speed link under the different impedances of the transition region wires A1 and A2 according to a simulation result; and determining optimal impedance values of the transition region wires A1 and A2 according to a comparison result. According to the method disclosed by the invention, the transition region wires are added before and after the capacitor, and the influence of the transition region wires on the overall characteristics of the link under the condition of the different impedances is simulated to obtain the optimal impedance values of the transition region wires.

Description

technical field [0001] The invention relates to the technical field of servers, in particular to a method for optimizing impedance discontinuity at high-speed link capacitance. Background technique [0002] In traditional digital system design, high-speed interconnect phenomena are often negligible because they have little impact on system performance. However, with the continuous development of computer technology, high-speed interconnection is playing a leading role among many factors that determine system performance, which often leads to some unforeseen problems and greatly increases the complexity of system design. Therefore, in the design of high-speed links, it is necessary to optimize each module as much as possible, evaluate the design feasibility and risk points in advance with the help of simulation tools, and optimize the design based on the simulation results to improve the success rate of system design and shorten the development cycle. [0003] In the design ...

AI Technical Summary

Problems solved by technology

Although the above design idea can effectively improve the impedance at the capacitor and reduce the impedance discontinuity, hollowing out the reference layer of the capacitor pad will reduce the integrity of the reference plane, affect the flow distribution of the current, and may cause power integrity problems

In addition, if there are other high-speed lines under the capacitor, the reference planes of other high-speed lines will be incomplete, which will affect the quality of signal transmission

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