single event effect test method for soc system on chip

Abstract

The invention provides a single-event effect test method for an SoC (System on Chip). The single-event effect test method provided by the invention comprises steps of testing single-event effects of aCPU, a memory unit and a user-defined logical unit inside an SoC processor as well as AD, DA, a serial interface circuit and other peripheral units, can effectively test the single-event effects of different structural units inside the SoC processor, and realizes comprehensive and reasonable evaluation on the single-event effect of the SoC processor.

Description

technical field [0001] The invention relates to a single event effect test method for a system on a SoC chip. Background technique [0002] As integrated circuit technology enters a new stage, the market begins to pursue products with smaller volume, lower cost, and less power consumption. Therefore, a product that integrates individual or even the entire system on a chip—System On Chip (System On Chip) appears. , SoC). A system-on-a-chip integrates functions previously performed by multiple chips into a single chip. More specifically, it implements functions such as signal acquisition, conversion, storage, processing, and I / O on a single silicon chip, or integrates digital circuits, analog circuits, signal acquisition and conversion circuits, memory, MPU, MCU, DSP, MPEG, etc. realize the functions of a system. [0003] SoC is not a simple superposition of the functions of each chip, but starts from the functions and performance of the entire system, uses a combination of...

AI Technical Summary

Problems solved by technology

For complex devices such as ultra-large-scale SoC, there is currently no corresponding patent describing its single event effect test method

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