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Device and method for realizing border-scanning multi-link test

A boundary scan test and boundary scan technology, applied in the direction of digital circuit test, electronic circuit test, etc., can solve the problems of unfavorable boundary scan resource test, inconvenient use, etc., achieve simple, convenient and flexible link expansion, and reduce the need to replace scan links The number of times, the effect of improving test coverage

Inactive Publication Date: 2007-11-14
ZTE CORP
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AI Technical Summary

Problems solved by technology

The patented multi-chain extension method is mechanical and inconvenient to use
[0010] The current boundary-scan test method has the following defects: 1. It can only realize single-chain testing, which is not conducive to making full use of boundary-scan resources for testing; 2. It can realize multi-link testing, but link expansion is realized by mechanical means. not convenient

Method used

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  • Device and method for realizing border-scanning multi-link test
  • Device and method for realizing border-scanning multi-link test

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Embodiment Construction

[0040] Various preferred embodiments of the present invention will be described in more detail below in conjunction with the accompanying drawings.

[0041] The device 100 of the present invention capable of realizing boundary scan multi-link testing, as shown in FIG. 1 , includes a PC module, a boundary scan test card and a boundary scan expansion card. Wherein, the PC module includes a human-computer interaction interface module, a test vector generation module, a data transmission module, a fault location module and a driver module of a boundary scan test card, as shown in FIG. 2 .

[0042] The human-computer interaction interface module completes human-computer interaction, test function item selection and configuration settings of the test device; the test vector generation module completes the generation of test vectors; the data transmission module completes the transmission of test vectors and port configuration data ; The driver module of the boundary scan test card c...

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Abstract

This invention discloses multi-link testing devices and methods which can realize boundary scan. Including: PC module, boundary-scan test card and boundary scan card expansion card; described boundary-scan extended card composed by boundary scan expansion modules , used in a number of boundary-scan test link, through analytical sent from the PC port choice test configuration, boundary scan port expansion card on the number of boundary scan link together into a new boundary scan link , for testing. The invention through the boundary-scan test device provide to PC users easy-to-use interface, test vector generation and the analysis of test data, through PC hardware and procedures rapidly with good boundary-scan test and link extension, chains expansion is easy and convenient flexible scanning, reduced the frequency of chains replacement and increase test coverage and achieve program simple, economical and practical.

Description

technical field [0001] The invention relates to a boundary scan test device and method in the field of electronic communication, in particular to a device and method capable of realizing boundary scan multi-link test. Background technique [0002] In the prior art, there are more and more pins in large-scale integrated circuits, and the pitch between pins is getting smaller and smaller. Especially with the emergence of surface mount technology, the complexity of integrated circuits is also increasing, and the layout and wiring density of circuit boards is increasing rapidly. In this case, traditional in-circuit test (ICT) technology has been challenged, and it is difficult to complete the test accurately. . [0003] In the above background, in order to solve the test problems of large-scale integrated circuits, in the 1980s, the Joint Test Action Group (JTAG, Joint Test Action Group) organized and formulated the boundary scan test standard, which was approved by the Institu...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/317
Inventor 李乾坤李宏伟王晓卿
Owner ZTE CORP
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