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Instruction issue processing circuit of uniform dyeing device array

A technology for instruction emission and processing circuits, which is applied in the field of instruction emission processing circuits, can solve problems such as inability to execute instructions immediately and pipeline delay, and achieve the effects of saving resources, simple circuit implementation, and improving execution efficiency

Active Publication Date: 2018-06-08
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the unified shader array, due to the data and structure correlation between instructions, the following instructions cannot be executed immediately, and the pipeline must stop for several cycles before continuing to execute the following instructions, resulting in pipeline delay

Method used

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  • Instruction issue processing circuit of uniform dyeing device array

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Embodiment Construction

[0025] The technical solutions of the present invention are clearly and completely described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are all Belong to the protection scope of the present invention.

[0026] Such as figure 1 As shown, an instruction emission processing circuit of a unified dyer array is characterized in that: it mainly completes the function of simultaneous emission processing of two instructions; it includes an instruction fetch module 1, a BUFFER module 2, a pre-decoding module 3, and an IBUFFER module 4 , decoding module 5 scoreboard module 6 and warp scheduler module 7.

[0027] Instruction fetching module 1 is connected with BUFFER module 2, decoding module 5, externa...

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Abstract

The invention belongs to the technical field of integrated circuits, and provides an instruction issue processing circuit of a uniform dyeing device array. The circuit comprises an instruction fetching module 1, a BUFFER module 2, a pre-decoding module 3, an IBUFFER module 4, a decoding module 5, a scoreboard module 6 and a warp scheduler module 7. The circuit has the technical effect that 1 at least 8 instructions are fetched from an Icache at each time, so that the frequency of accessing the Icache is reduced to a certain extent and the instruction execution efficiency can be improved; 2, buffers and ibuffers of a plurality of warps are independently realized by registers, so that the logic can be reused and the circuit realization is simple; and 3, the pre-decoding module and the decoding module realize corresponding decoding functions of two instructions in different stages, circuits in an instruction issue processing mechanism circuit have the modules, and the manner that multiplewarps correspond to multiple modules is not adopted so that the circuit realization is simple and resources are saved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits and relates to an instruction emission processing circuit of a unified dyer array. Background technique [0002] The uniform dyer array in the graphics processor implements the unified dyeing function of vertices and pixels. In the unified shader array, due to the data and structure correlation between instructions, subsequent instructions cannot be executed immediately, and the pipeline must stop for several cycles before continuing to execute subsequent instructions, resulting in pipeline delay. Therefore, the SIMT (Single Instruction Multiple Thread) method is adopted, and the instruction is repeatedly executed in several subsequent cycles. After the last execution of the instruction is completed, the following instructions have the execution conditions and can be executed immediately. In this way, the pipeline delay can be hidden, and the throughput of the dyeing task can be impro...

Claims

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Application Information

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IPC IPC(8): G06T1/20
CPCG06T1/20G06T2200/28
Inventor 魏艳艳田泽牛少平任向隆韩一鹏魏美荣
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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