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High-performance X-structural multilayer global wiring method in super-large-scale integrated circuit

A large-scale integrated circuit and overall wiring technology, applied in the field of integrated circuit computer-aided design, can solve problems such as the overall wiring algorithm that has not yet been developed, and achieve the effect of increasing the overflow number

Active Publication Date: 2018-03-23
上海立芯软件科技有限公司
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AI Technical Summary

Problems solved by technology

However, the existing research on the overall routing problem of non-Manhattan structures is limited to the research on the overall routing problem of single-layer structures. As far as we know, no overall routing algorithm research has been carried out considering the two conditions of non-Manhattan structures and multi-layer structures.

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  • High-performance X-structural multilayer global wiring method in super-large-scale integrated circuit
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  • High-performance X-structural multilayer global wiring method in super-large-scale integrated circuit

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Embodiment Construction

[0053] The technical solution of the present invention will be specifically described below in conjunction with the accompanying drawings.

[0054] Aiming at the overall wiring problem considering the two important conditions of non-Manhattan structure and multi-layer wiring structure, the X structure is used as the representative of non-Manhattan structure. On the basis of the previous single-layer overall wiring algorithm research, the present invention is based on the integer programming model (integer Linear programming (ILP for short) and particle swarm optimization (PSO for short), aiming at a series of deficiencies in the existing work, proposed four effective improvement strategies, and introduced a multi-layer wiring model and a layer scheduling strategy. Thus, a high-performance X-structure multilayer overall router is constructed, which is called FZU-Router. The work of the present invention is the first effective solution to the X-structure multilayer overall wirin...

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Abstract

The invention relates to a high-performance X-structural multilayer global wiring method in a super-large-scale integrated circuit. On the basis of an XGRouter wiring device, the method includes the steps of adding a wiring mode of a new type, combining a subgroup optimization algorithm with a maze wiring mode based on new wiring cost, adopting a reduction strategy for prewiring volume in an initial stage, designing a dynamic resource scheduling strategy, then introducing a multilayer wiring model, simplifying an integral linear programming model of the XGRouter, and finally constructing a high-performance X-structural multilayer global wiring device. A simulation experiment result in a standard testing circuit indicates that compared with other kinds of global wiring devices, optimal effects can be achieved on both the most important optimization targets including the two indexes--an overflow value and a line length total cost in multilayer global wiring.

Description

technical field [0001] The invention relates to the technical field of computer-aided design of integrated circuits, in particular to a high-performance X-structure multilayer overall wiring method in ultra-large-scale integrated circuits. Background technique [0002] As the size of semiconductors and interconnects continues to shrink, interconnects seriously affect many key design indicators. Therefore, the wiring stage that organizes the actual routing positions of interconnects is very important in today's VLSI (very large scale integration, referred to as VLSI) physical design becomes particularly important. The complex routing process is composed of two stages: overall routing and detailed routing. In general routing, the routing of each net is assigned to each channel routing area, and the routing problems of each channel area are clearly defined. The detailed routing gives the specific location of each net in the channel area. Therefore, the quality of overall wir...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/392G06F2111/04G06F2111/06
Inventor 刘耿耿郭文忠陈国龙
Owner 上海立芯软件科技有限公司
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