Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

System of verification and solution of satisfiability modulo theory (SMT)-based fault tree and method thereof

A technology of fault tree and modulus theory, which is applied in the field of fault tree verification and solution system, can solve problems such as no effective method, no effective and convenient method to ensure the correctness of fault tree, permutation and combination explosion, etc., to ensure correctness , avoid approximation error, and ensure the effect of correctness

Active Publication Date: 2018-01-09
合肥中科昂辉科技有限公司
View PDF3 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] Methods and tools for developing and analyzing fault tree models often use general-purpose computer programming languages, so there are two problems to be solved or improved as mentioned above: there is no effective and convenient method to ensure the correctness of the fault tree itself; The process itself also needs a lot of checking calculations to ensure the correctness of the calculation results; general language and the current computer resources, there is no effective way to solve the permutation and combination explosion problem. Generally speaking, some method is used to obtain an approximate solution. That is to say, some minimum cut sets may be discarded in the approximation process

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System of verification and solution of satisfiability modulo theory (SMT)-based fault tree and method thereof
  • System of verification and solution of satisfiability modulo theory (SMT)-based fault tree and method thereof
  • System of verification and solution of satisfiability modulo theory (SMT)-based fault tree and method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0026] Such as Figure 1-5As shown, the verification and solution system of the fault tree based on the satisfiable modulus theory includes the fault tree described in the formal language of the satisfiable modulus theory, that is, the relationship between the nodes of the fault tree is analyzed and the logical relationship is described. The description process includes the The logical relationship between nodes is defined, and the specification of the satisfiable module theory is described according to the formal language. The specific technology includes the SMT formal language, but not limited to the current SMT language. Including the formal verification tool, that is, the SMT solver, to receive and verify the formal logic formula of the input fault tree, check its correctness, and give an error report. The user modifies the fault tree to meet the correctness requirements. The verification process includes: receiving The input file of the fault tree and its logical relatio...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to the technical field of computer software, and particularly to a system of verification and solution of a satisfiability modulo theory (SMT)-based fault tree and a method. Thesystem of verification and solution of the satisfiability modulo theory-based fault tree includes: the fault tree described by a formalized language of the satisfiability modulo theory; a formalized verification tool, namely an SMT solver which receives and verifies formalized logical formulas input into the fault tree, checks correctness thereof, and gives an error report; and a satisfiability modulo theory-based mini cut set (MCS) solution method which gives a mini cut set condition, gives a constraint condition at the same time to constrain output cut sets, outputs the number of elements ofthe output mini cut sets according to a user requirement size, and solves the problem of dependence of mini cut set calculation on a node order. A method, based on the satisfiability modulo theory ofthe above-mentioned system, of verification and solution of the mini cut sets is also included. According to the system, the satisfiability modulo theory can be used to carry out formalized verification on the fault tree, and correctness of a model is guaranteed.

Description

technical field [0001] The invention relates to the technical field of computer software, in particular to a fault tree verification and solution method, in particular to a fault tree verification and solution system and method based on a satisfiable model theory. Background technique [0002] Technological advances in many systems (including aircraft or other systems, such as those in the aerospace, automotive, marine, medical, and electronics industries) have led to rapid increases in complexity, and the reliability certification process for these systems requires one or more sub- Failure or fault analysis of a system, which is usually performed manually by a systems analyst. As complex systems and the systems of which they are composed become more integrated, traditional analysis methods can face reliability challenges due to many complexities in terms of the breadth of coverage and labor costs involved. [0003] Fault tree models are often used during the design, develo...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F11/07
Inventor 方菱曾新华李国强张民
Owner 合肥中科昂辉科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products