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Package structure and packaging method of biometric chip

A biometric identification and packaging structure technology, applied in electrical components, electrical solid devices, circuits, etc., can solve the problems of insufficient chip strength and thick chip package thickness, improve strength and reliability, reduce overall thickness, The effect of reducing package size

Pending Publication Date: 2017-10-13
苏州科阳半导体有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] An object of the present invention is to provide a packaging structure of a biometric identification chip, which is used to solve the problems of thick chip package body and insufficient chip strength

Method used

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  • Package structure and packaging method of biometric chip
  • Package structure and packaging method of biometric chip
  • Package structure and packaging method of biometric chip

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Embodiment Construction

[0049] In order to make the technical problems solved by the present invention, the technical solutions adopted and the technical effects achieved clearer, the technical solutions of the embodiments of the present invention will be further described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only the technical solutions of the present invention. Some, but not all, embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present invention.

[0050] Such as Figure 5-Figure 8 As shown, the present embodiment provides a packaging structure of a biometric identification chip, the packaging structure includes a chip 1, the chip 1 is provided with a front and a back, wherein the front is provided with a chip sensing area 101 for sensing external identification signals, and the chip senses A nu...

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PUM

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Abstract

The invention belongs to the technical field of semiconductor packaging, and discloses a package structure and a packaging method of a biometric chip. The package structure comprises a chip, wherein the front of the chip is provided with a chip sensing area and a plurality of first pads, the back of the chip is provided with a plurality of second pads, the chip is provided with a silicon through hole and a metal wiring layer, the metal wiring layer leads the first pads of the chip through the silicon through hole to the second pads of the chip, and the front and side of the chip are coated with a plastic layer. The packaging method comprises the steps of bonding biometric wafers so as to form a temporary substrate; grinding the wafers to reduce the thickness; preparing the silicon through hole of the wafer; re-wiring for the wafer; removing the temporary substrate; cutting the wafer; plastic packaging; testing the chip; and laser cutting. Due to combination of a wafer level packaging technology of the through hole silicon and a traditional plastic packaging technology, the chip is plastic packaged in multiple sides, so that the chip is ultra-thin and is greatly improved in strength.

Description

technical field [0001] The invention relates to the technical field of semiconductor packaging, in particular to a packaging structure and a packaging method of a biometric identification chip. Background technique [0002] With the rapid development of current technology, biometric chips are being used in more and more fields because of their simplicity and practicality. At the same time, various electronic devices also put forward higher and higher requirements on the size and thickness of the chip packaging structure. There are three main technical solutions for existing chip packaging: [0003] Option one, such as figure 1 As shown, the traditional wire bonding + plastic encapsulation process, the main process methods are as follows: Grinding the biometric wafer → cutting it into individual grains → fixing the grains on the substrate with a prefabricated circuit layoutpunching gold wires to place the chip The solder joints on the board (bond pad) and the solder joi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/48H01L23/488H01L21/56
CPCH01L21/568H01L23/3107H01L23/481H01L23/488
Inventor 吕军赖芳奇李永智金科沙长青
Owner 苏州科阳半导体有限公司
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