Current mode single-digit full adder based on FinFET transistor

Abstract

The invention discloses a current mode single-digit full adder based on a FinFET transistor. The current mode single-digit full adder comprises a first P type FinFET tube, a second P type FinFET tube, a third P type FinFET tube, a fourth P type FinFET tube, a first N type FinFET tube, a second N type FinFET tube, a third N type FinFET tube, a fourth N type FinFET tube, a fifth N type FinFET tube, a sixth N type FinFET tube, a seventh N type FinFET tube, an eighth N type FinFET tube, a ninth N type FinFET tube, a tenth N type FinFET tube and an eleventh N type FinFET tube. The current mode single-digit full adder has the advantages that the circuit area, the delay, the power consumption and the power delay product are smaller.

Description

technical field [0001] The invention relates to a one-bit full adder, in particular to a current modulus one-bit full adder based on FinFET transistors. Background technique [0002] As the size of transistors continues to shrink, limited by the short-channel effect and the current manufacturing process, the space for reducing the size of ordinary CMOS transistors is extremely narrowed. When the size of an ordinary CMOS transistor is reduced to below 20nm, the leakage current of the device will increase sharply, resulting in a large leakage power consumption of the circuit. Moreover, the short-channel effect of the circuit becomes more obvious, and the device becomes quite unstable, which greatly limits the improvement of the circuit performance. FinFET tube (Fin Field-Effect Transistor, Fin Field-Effect Transistor) is a new complementary metal oxide semiconductor (CMOS) transistor, a new type of 3D transistor, which is widely used in current circuit design. [0003] One-b...

AI Technical Summary

Problems solved by technology

The number of transistors used in the current modulus 1-bit full adder is large, and the CMOS transistors connected in series lead to a too long stack height from the power supply to the ground. In order to make the circuit work normally and ensure that the simulation waveform is not distorted, it is necessary to increase the working power of the circuit accordingly. Or adjust the bias voltage Vrfn and Vrfp through the VSC circuit, resulting in large circuit area, delay, power consumption and power consumption delay product

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