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Gate scanning circuit and display panel

A gate scanning and circuit technology, used in static indicators, digital memory information, instruments, etc., can solve problems such as transistor threshold voltage drift, affecting the stability and reliability of gate scanning circuits, and avoid DC bias, The effect of improving stability and reliability, avoiding threshold voltage drift

Active Publication Date: 2017-05-24
SHANGHAI AVIC OPTOELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In the existing gate scanning circuit, whether the forward scanning sequence or the reverse scanning sequence is adopted, a transistor controlling the scanning direction in the shift register will be in a DC bias state. During the long-time display driving process, The DC bias problem will cause the threshold voltage of the transistor to drift, affecting the stability and reliability of the gate scanning circuit

Method used

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  • Gate scanning circuit and display panel
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  • Gate scanning circuit and display panel

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Embodiment Construction

[0062] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0063] In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0064] refer to figure 1 , figure 1 A schematic structural diagram of a gate scanning circuit provided by an embodiment of the present invention, the gate scanning circuit includes: N shift registers 11 sequentia...

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Abstract

The invention discloses a gate scanning circuit and a display panel. The gate scanning circuit comprises N shift registers arranged sequentially in the first direction, wherein N is a positive integer more than 4; the shift register has a first scanning sequence control end, a second scanning sequence control end, a first input end, a second input end and an output end; the N shift registers are sequentially a first-stage shift register to an N-stage shift register in the first direction; for the n-stage shift register, the first scanning sequence control end is connected with the output end of the n-c-stage shift register, the second scanning sequence control end is connected with the output end of the n+d-stage shift register, the first input end is connected with the output end of the n-a-stage shift register, and the second input end is connected with the output end of the n+b-stage shift register. The technical solution solves the problem of direct current bias of the gate scanning circuit, and improves the stability and the reliability.

Description

technical field [0001] The present invention relates to the technical field of display devices, and more specifically, to a grid scanning circuit and a display panel. Background technique [0002] With the continuous development of science and technology, more and more display devices are widely used in people's daily life and work, which brings great convenience to people's daily life and work, and has become an indispensable and important display device for people today. tool. [0003] The main component of the display device to realize the display function is the display panel. The display panel needs to use the gate scanning circuit to scan the gate lines one by one according to a preset scanning sequence, so as to drive the pixels of the display panel for image display. The gate scanning circuit is composed of a plurality of cascaded shift registers, and the shift registers are connected to the gate lines in one-to-one correspondence. [0004] When scanning the gate ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/20G09G3/3266G09G3/36G11C19/28
CPCG09G3/20G09G3/3266G09G3/3674G09G2310/0267G09G2310/0286G11C19/28
Inventor 简守甫夏志强敦栋梁曹兆铿
Owner SHANGHAI AVIC OPTOELECTRONICS
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