A stacked high temperature annealing process
A high-temperature annealing and stacking technology, applied in the manufacture of electrical components, circuits, semiconductor/solid-state devices, etc., can solve the problems of fragile silicon wafer carrying devices, easy surface contamination, and easy edge chipping, etc., to improve quality and Qualification rate, reduction of boat loading and unloading time, and large efficiency improvement
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[0033] (1) Stack the etched M2 monocrystalline silicon wafers neatly in a manner of 100 pieces / stack, and put them into the quartz wafer holder for annealing;
[0034] (2) Cover the silicon chip of the quartz chip frame with a quartz cover plate and press the silicon chip, and send the quartz chip frame into a high-temperature diffusion / oxidation furnace;
[0035] (3) The furnace tube of the high-temperature diffusion / oxidation furnace is heated and stabilized to 650° C., annealed, and the holding time is 20 minutes, and nitrogen gas of 20000 sccm is introduced;
[0036] (4) Cooling out of the furnace: cool down the furnace tube of the high-temperature diffusion / oxidation furnace to 600° C., hold for 600 s, and then out of the furnace.
[0037] After cooling, test the square resistance. At the same time, the traditional high-temperature annealing process was used to process the etched M2 single crystal silicon wafer, and after cooling, the square resistance was tested.
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