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Formation method of semiconductor device

A semiconductor and device technology, applied in the field of semiconductor device formation, can solve the problems of complex formation process, the electrical performance of semiconductor devices needs to be improved, and high production cost, and achieve the effects of simple process steps, improved electrical performance, and increased operating speed

Active Publication Date: 2016-11-23
SEMICON MFG INT (SHANGHAI) CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, in order to improve the operating speed of semiconductor devices, the formation process of semiconductor devices provided by the prior art is relatively complicated, the production cost is high, and the electrical properties of semiconductor devices still need to be improved.

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  • Formation method of semiconductor device

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Embodiment Construction

[0033] It can be seen from the background art that the process for forming semiconductor devices in the prior art is relatively complicated, and the electrical performance of the formed semiconductor devices still needs to be improved.

[0034] It has been found through research that, in one embodiment, in order to improve the carrier mobility of the semiconductor device, the formation process of the semiconductor device includes the following steps: step S1, providing a substrate, and forming a gate structure on the surface of the substrate; step S2 , etching and removing the partial thickness of the substrate on both sides of the gate structure, and forming a groove in the substrate; step S3, using a selective epitaxy process, depositing a stress layer in the groove, and the The stress layer fills the groove; step S4, forming a covering layer on the surface of the stress layer; step S5, forming a metal layer on the surface of the covering layer; step S6, annealing the metal l...

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Abstract

The invention relates to a formation method of a semiconductor device, which comprises the steps of providing a substrate, wherein the surface of the substrate is provided with a gate structure; carrying out first doping processing on the substrate at both sides of the gate structure, and forming a doped region in the substrate at both sides of the gate structure; forming a metal silicide layer at the surface of the doped region; carrying out second doping processing on the metal silicide layer, wherein the second doping processing is suitable for reducing the Schottky barrier height between the metal silicide layer and the doped region; forming a zinc sulfide-silicon oxide layer at the surface of the top part of the gate structure; forming an interlayer dielectric layer on the metal silicide layer and at the surface of the zinc sulfide-silicon oxide layer; and carrying out annealing processing on the zinc sulfide-silicon oxide layer. The formation method is simple in process for forming the semiconductor device, the operation rate of the semiconductor device is effectively improved, and the electrical performance of the semiconductor device is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor device. Background technique [0002] With the continuous development of semiconductor technology, carrier mobility enhancement technology has been widely studied and applied. Improving the carrier mobility in the channel region can increase the driving current of semiconductor devices and improve the performance of devices. [0003] In the existing manufacturing process of semiconductor devices, since stress can change the energy gap and carrier mobility of silicon materials, it has become more and more common means to improve the performance of semiconductor devices through stress. Specifically, by properly controlling the stress, the mobility of carriers (electrons in NMOS devices, holes in PMOS devices) can be increased, thereby increasing the driving current, thereby greatly increasing the operating speed of semiconduc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/336
CPCH01L29/401H01L29/42364H01L29/42376H01L29/513H01L29/66568
Inventor 张海洋张城龙
Owner SEMICON MFG INT (SHANGHAI) CORP
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