Method and server for functional verification of microprocessor

A microprocessor and server technology, applied in the computer field, can solve problems such as poor debugging, low accuracy of simulation verification, hardware simulation accelerator cannot support instruction-level verification, etc., and achieve the effect of improving accuracy and debuggability

Active Publication Date: 2016-11-23
LOONGSON TECH CORP
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Problems solved by technology

[0005] The present invention provides a method and server for functional verification of microprocessors, which are used to solve the problem of low accuracy of simulation verification based on FPGA prototype verification system in the prior art, poor debuggability, and failure to support simulation verification based on hardware simulation accelerators. Instruction-level verification and other issues

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  • Method and server for functional verification of microprocessor
  • Method and server for functional verification of microprocessor
  • Method and server for functional verification of microprocessor

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Embodiment Construction

[0039] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0040] figure 1 It is a flow chart of a method for verifying the function of a microprocessor provided by an embodiment of the present invention. Such asfigure 1 As shown, the method includes:

[0041] Step S100, generating at least one random instruction, an expected running result corresponding to each random instruction, and initializati...

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Abstract

The invention provides a method and server for functional verification of a microprocessor. The method includes the steps that at least one random instruction, expected operating results corresponding to all the random instructions and initialization data are generated; a bit stream file is generated according to original-register transmission-level RTL codes of the microprocessor; the bit stream file is loaded into a hardware simulation accelerator, and the at least one random instruction and the initialization data are loaded into a memory of a simulation microprocessor and a user-visible register, and the simulation microprocessor is formed in the mode that the microprocessor is burned into the hardware simulation accelerator; the hardware simulation accelerator is controlled to operate the at least one random instruction; the function of the microprocessor is verified according to the operating result of the at least one random instruction through the hardware simulation accelerator and the expected operating results corresponding to all the random instructions. By means of the method and server in the technical scheme, the accuracy and the debugging performance of functional verification of the microprocessor can be improved.

Description

technical field [0001] The invention relates to computer technology, in particular to a method and server for functional verification of a microprocessor. Background technique [0002] A microprocessor is a central processing unit composed of one or a few large-scale integrated circuits. These circuits perform the functions of a control unit and an arithmetic logic unit. The microprocessor can complete operations such as fetching instructions, executing instructions, and exchanging information with external memory and logic components. It is the operation control part of the microcomputer. There are usually three methods for functional verification of microprocessors: simulation verification based on software simulators, simulation verification based on Field Programmable Gates Array (Field Programmable Gates Array, FPGA) prototype verification system, and simulation verification based on hardware simulation accelerators. . [0003] The simulation verification based on th...

Claims

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Application Information

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IPC IPC(8): G06F11/26
Inventor 王朋宇尹夕振
Owner LOONGSON TECH CORP
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