Signal establishing time control circuit and dynamic storage based on same

Abstract

The invention relates to a signal establishing time control circuit and a dynamic storage based on the same. The signal establishing time control circuit comprises a first delay unit, a second delay unit and a multiplexer, wherein a selected word line signal wlmimic is divided into two paths by virtue of the first delay unit, the first path directly outputs a signal SA_en1, the second path outputs a signal SA_en2 by virtue of the second delay unit, the multiplexer outputs sense amplifier enabling signals by selecting the signal SA_en1 and the signal SA_en2, and the gating of the multiplexer is controlled by virtue of signal refresh. According to the signal establishing time control circuit, the technical problem of short storage retention time when same signal establishing time is adopted during activation operation and refresh operation of an existing dynamic storage is solved, and the data retention time of the dynamic storage is effectively prolonged.

Description

technical field [0001] The invention relates to a dynamic memory, the improvement of which is to lengthen the signal development time in the prior art dynamic memory in the refresh state so as to increase the data retention time of the dynamic memory. Background technique [0002] Such as figure 1 As shown, the dynamic memory storage unit is composed of a transistor and a capacitor. Data is stored on the capacitor. Due to the leakage path, the charge on the capacitor will be lost, so the dynamic memory must have a refresh operation to keep the data on the capacitor. A refresh operation of a dynamic memory is internally composed of multiple activation (ACT) operations. as attached figure 2 As shown, the activation operation principle is as follows: before the activation operation, the voltage of the word line is low, the voltage of the bit line (bl) and the reference bit line (ref_bl) is an intermediate voltage, assuming that the value stored in the memory cell is '1', its...

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Problems solved by technology

[0006] In order to solve the technical problem that the existing dynamic memory adopts the same signal setup time during activation operation and refresh operation, and the storage retention time is short, one of the purposes of the present invention is to provide a signal setup time control circuit, and the second purpose is to provide A dynamic memory based on a control circuit to increase the data retention time of the dynamic memory

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