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A cpu design method and computing system oriented to symbolic bdd operation

A design method and symbol technology, applied in the computer field, can solve problems such as numerous data structure steps and waste of time cycles, and achieve the effects of speeding up operations, reducing waste, and enhancing portability

Active Publication Date: 2018-10-19
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

[0007] The above method accelerates the BDD operation from the two directions of algorithm optimization and hardware function module respectively, but there is still the problem that there are many steps in the data structure used when running the operation program in a high-level language
In addition, the processors used in these methods are all general-purpose processors. In the case that only specific operations are specified, the use of general-purpose instruction sets is likely to cause a waste of time cycles.

Method used

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  • A cpu design method and computing system oriented to symbolic bdd operation
  • A cpu design method and computing system oriented to symbolic bdd operation
  • A cpu design method and computing system oriented to symbolic bdd operation

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Embodiment Construction

[0067] A CPU design approach for symbolic BDD operations, such as figure 1 shown, including the following steps:

[0068] Step A. According to the BDD tree structure and attributes, design a reasonable BDD data structure, storage method, and recursive mapping method;

[0069] Step A1. Assign four attribute values ​​to each node, which are AOP, level, low, high, and the variable value of the point corresponding to level; AOP represents the address offset parameter of the point corresponding to the point; low and high are respectively the two values ​​of the node The branch points to, pointing to the AOP value of the child node;

[0070] Step A2. Using four storage unit values ​​to represent each attribute of the node respectively;

[0071] Step A3. The hash value is filled with the AOP values ​​of the two operation points;

[0072] Step A4. Use the leaf node as the initial address, and then use the depth-first principle to determine the expression form of the data structure ...

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Abstract

The invention discloses a CPU design method and calculating system oriented at symbol BDD operation. The method comprises the steps of BDD structure design, a novel data structure operation algorithm, special command system design, CPU kernel and framework design, BDD operation special operation system construction and system hardware implementation. According to the CPU design method and calculating system, an operation object is converted through an upper computer of a user and transmitted to a designed special BDD operation system, and operational calculation is conducted on BDD through a special CPU operation mechanism in the system so that the purpose of rapid operation can be achieved; by establishing the novel BDD structure and the corresponding operation algorithm, operation efficiency of BDD operation is improved. By means of the CPU design method and calculating system, a BDD operation calculating task can be completed under the condition that algorithm efficiency and hardware processing efficiency are high, and meanwhile correctness and simplicity of BDD can be guaranteed.

Description

technical field [0001] The present invention relates to the technical field of computers, in particular to a CPU design method and a computing system for symbolic BDD (Binary Decision Diagram, binary decision diagram) operations. Background technique [0002] Symbolic BDD operations are applied in cryptography, IP routing lookup, assembly sequence planning and other fields. Improving the speed of data processing, ensuring the correctness and stability of operation results, and reducing hardware consumption and energy consumption are long-term pursuits in these fields. [0003] At present, there are mainly methods to improve the operation speed of BDD operations: [0004] (1) Based on OBDD method: convert BDD to OBDD, and streamline and convert it to ROBDD, which can reduce the amount of data storage and calculation, and can effectively reduce the time for operation and calculation. [0005] (2) Based on the hardware acceleration method: Design a hardware module that stores ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
CPCG06F30/327
Inventor 古天龙闵丰徐周波宁黎华常亮
Owner GUILIN UNIV OF ELECTRONIC TECH
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