Method for optimizing calculation based on heterogeneous platform for human face area filtering method
A face area, heterogeneous platform technology, applied in computing, image data processing, instruments, etc., can solve problems such as poor real-time performance, large amount of calculation, and reduced computing efficiency.
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Embodiment 1
[0080] Embodiment 1: as figure 1 , figure 2 , Figure 5 As shown, the present invention discloses a calculation and optimization method of the face area filtering method on the X86 architecture platform, including: row direction filtering and column direction filtering;
[0081] Such as figure 1 , Figure 5 As shown, the row direction filtering method is:
[0082] S101. When the processor of the X86 architecture is a single core, enable single-thread processing; when the processor of the X86 architecture is multi-core, enable multi-thread processing, and each thread processes a part of pixels in the face area;
[0083] S102. Select the SSE embedded instruction set on the X86 architecture platform to provide instructions for the filtering of pixels; the X86SSE instruction set is a SIMD (Single Instruction, Multiple Data, single instruction, multiple data) instruction set on the X86 platform, which processes multiple instructions through one instruction. In order to achiev...
Embodiment 2
[0106] Embodiment 2: as Figure 3-5 As shown, the present invention discloses a calculation and optimization method of a face area filtering method on an ARM architecture platform, including: row-wise filtering and column-wise filtering;
[0107] Such as image 3 , Figure 5 As shown, the row direction filtering method is:
[0108] S301. When the processor of the ARM architecture is a single core, enable single-thread processing; when the processor of the ARM architecture is multi-core, enable multi-thread processing, and each thread processes a part of pixels in the face area;
[0109] S302. Select the NEON embedded instruction set on the ARM architecture platform to provide instructions for pixel filtering; the ARMNEON instruction set is a 128-bit SIMD (Single Instruction, Multiple Data, single instruction, multiple data) instruction set on the ARM platform, through a single instruction The method of processing multiple data achieves the purpose of improving data processi...
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