Gate drive circuit and display using same

Abstract

A gate drive circuit comprises a plurality of GOA circuit units. Every two GOA circuit units share one drop-down circuit. Each drop-down circuit comprises a first transistor, a second transistor and a third transistor, wherein the gate of the first transistor is electrically connected with a first start signal, the drain of the first transistor is electrically connected with a first clock signal or a second clock signal, the gate of the second transistor is electrically connected with a second start signal, the drain of the second transistor is electrically connected with a second clock signal or a first clock signal, the gate of the third transistor is electrically connected with the source of the first transistor and the source of the second transistor, and the drain of the third transistor is electrically connected with a first fixed voltage. Every two GOA circuit units of the gate drive circuit share one drop-down circuit, and therefore the number of the transistors used by the gate drive circuit can be decreased, and the frequencies of the first clock signal and the second clock signal can be decreased. Due to the fact that the frequencies of the first clock signal and the second clock signal are decreased, the charging and discharging frequency of a stray capacitor is decreased, and the overall power consumption of the gate drive circuit is lowered.

Description

technical field [0001] The present invention relates to a display, especially a display using a gate driver (Gated driver on array, GOA) circuit. Background technique [0002] In the GOA circuit, the gate driver is manufactured on a substrate with a thin film transistor (Thinfilm transistor, TFT) array by using a thin film transistor display array process, so as to realize a progressive scanning driving method. [0003] The GOA circuit includes several GOA circuit units, and each GOA circuit unit is composed of several transistors and several capacitors. Since the GOA circuit is directly formed on the side of the glass substrate, the fewer transistors and capacitors each GOA circuit unit has, the less area the GOA circuit occupies on the glass substrate. In addition, each GOA circuit unit will charge and discharge the parasitic capacitance every time the signal is switched. Therefore, a clock signal with a higher frequency has a greater impact on the power consumption gene...

AI Technical Summary

Problems solved by technology

Therefore, a clock signal with a higher frequency has a greater impact on the power consumption generated by the parasitic capacitance

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