Formation method of nand flash memory device

Abstract

A formation method of an NAND flash memory device comprises the following steps of providing a semiconductor substrate, wherein the semiconductor substrate possesses a core device area and a peripheral circuit area located on an edge of the core device area; forming a plurality of first discrete grid structures on the core device area and first hard mask layers located on the first grid structures, wherein each first grid structure comprises a first grid and a first grid dielectric layer; forming first dielectric layers on two sides of the first grid structures; etching the first dielectric layers till that a groove which exposes a first grid sidewall is formed; carrying out scouring technology on a side wall of the groove; after the scouring technology is performed, removing the first hard mask layers. By using the formation method, performance of the NAND flash memory device can be increased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a NAND flash memory device. Background technique [0002] Among the non-volatile semiconductor memories, there are Electrically Erasable Programmable Read Only Memory (EEPROM) and Electrically Programmable Read Only Memory (EPROM). EEPROM includes FLASH EEPROM. A popular FLASH EEPROM architecture utilizes a NAND array with a large number of strings of memory cells connected by one or more select transistors between each bit line and a common source line, commonly known as a NAND flash memory device . [0003] The standard physical structure of a NAND flash memory device is called a memory cell (bit). In a NAND flash memory device, gates and conductive channels of different MOS transistors are separated by a gate insulating layer. The insulating layer is generally an oxide layer (gate oxide), and the NAND flash memory device has an additional lay...

AI Technical Summary

Problems solved by technology

NAND flash memory devices formed by existing methods have poor performance

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